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MT9074AL 参数 Datasheet PDF下载

MT9074AL图片预览
型号: MT9074AL
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1单芯片收发器 [T1/E1/J1 Single Chip Transceiver]
分类和应用: 电信集成电路
文件页数/大小: 122 页 / 371 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT9074  
Advance Information  
Bit  
Name  
Functional Description  
Bit Name  
Functional Description  
1
RAIS  
Remote Alarm Indication Status.  
If one, there is currently a remote  
alarm condition (i.e., received A bit  
is one). If zero, normal operation.  
Updated on a non-frame alignment  
frame basis.  
7
1SEC One Second Timer Status. This bit  
changes state once every 0.5 second  
and is synchronous with the 2SEC  
timer.  
6
5
2SEC Two Second Timer Status. This bit  
changes state once every second and  
is synchronous with the 1SEC timer.  
0
RCRS  
RAI and Continuous CRC Error  
Status. If one, there is currently an  
RAI and continuous CRC error  
400T 400 msec. Timer Status. This bit  
changes state when the 400 msec.  
CRC-4 multiframe alignment timer  
expires.  
condition.  
operation.  
If  
zero,  
normal  
on  
Updated  
a
multiframe basis.  
Table 104 - Alarm Status Word 1  
(Page 3, Address 11H) (continued) (E1)  
--  
4
3
Unused.  
CALN CRC-4 Alignment. This bit changes  
state every msec. When CRC-4  
multiframe  
alignment  
has  
been  
achieved state changes of this bit are  
synchronous with the receive CRC-4  
synchronization signal.  
2
1
KLVE Keep Alive. This bit is high when the  
AIS status bit has been high for at least  
100msec. This bit will be low when AIS  
goes low (I.431).  
T1  
Timer One. This bit will be high upon  
loss of terminal frame synchronization  
persisting for 100 msec. This bit shall  
be low when T2 becomes high. Refer  
to I.431 Section 5.9.2.2.3.  
0
T2  
Timer Two. This bit will be high when  
the MT9074 acquires terminal frame  
synchronization persisting for 10 msec.  
This bit shall be low when non-normal  
operational frames are received. I.431  
Section 5.9.2.2.3.  
Table 105 - Timer Status Word  
(Page 3, Address 12H) (E1)  
84  
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