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MT90733AP 参数 Datasheet PDF下载

MT90733AP图片预览
型号: MT90733AP
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS DS3成帧器( DS3F ) [CMOS DS3 Framer (DS3F)]
分类和应用: 电信集成电路
文件页数/大小: 8 页 / 56 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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CMOS
®
MT90733
DS3 Framer (DS3F)
Advance Information
Features
DS3 payload access in either bit-serial or
nibble-parallel mode
C-bit parity or M13 operating mode
Separate interface for C-bits
Detect and generate DS3 AIS, and idle signals
Transmit reference generator for serial
operation
Transmit and receive FEAC channel under
software control
Transmit single errors: framing, FEBE, C-bit
parity, and P-bit parity
FEBE, C-bit and P-bit performance counters
Transmit-to-Receive and Receive-to-Transmit
loopbacks
Subrate multiplexing
Wideband data or video transport
DS3 monitor and test
Channel extenders
Line Side
X1
X2
FE
D3RD
D3RC
CRD
CRCK
CRF
CRDCC
STUFC
STUFD
AD(7-0)
WR
RD
ALE
SEL
OENA
FORCEOE
CXD
CXCK
CXF
CXDCC
D3TD
D3TC
FORCECP
FORCEPP
FORCFEBE
U.S. Patent Number 5040170
ISSUE 1
May 1995
Ordering Information
MT90733AP
68 Pin PLCC
-40° to 85°C
Description
The MT90733 DS3 Framer (DS3F) is designed for
mapping broadband payloads into the DS3 frame for-
mat, which meets ANSI’s T1.107-1988 and supple-
ment T1.107a-1990.
Although the C-bit parity format is recommended, the
DS3F can also operate in the M13 mode. In the C-bit
parity format, the DS3F provides a separate interface
for selected C-bits. The DS3F also provides software
access for transmitting and receiving the FEAC chan-
nel, and generates and detects DS3 AIS, DS3 idle, P-
bit parity and C-bit parity. In addition, performance
counters are provided, as well as the ability to gener-
ate single framing, FEBE, C-bit parity and P-bit parity
errors. The payload interface is selectable through
software as either a bit-serial or nibble-parallel format.
Terminal Side
Applications
Receive
Serial Parallel
DS3
Receive
DS3
Interpreter
Output
N.C.
N.C.
N.C.
RDS
RCS
RCG
RFS
RNIB3
RNIB2
RNIB1
RNIB0
RCN
N.C.
RFN
µP
I/O
Transmit
Frame
Reference
Generator
TDOUT
TCG
TFOUT
TCOUT
TFIN
TCIN
N.C.
N.C.
XCK
XFSI
XDS
N.C.
N.C.
N.C.
XFNO
XCN
XCK
N.C.
XNIB3
XNIB2
XNIB1
XNIB0
Input
DS3
Send
Transmit
Figure 1 - Functional Block Diagram
5-23