ISO2-CMOS MT8880C/MT8880C-1
VDD
MT8880C/C-1
C3
VDD
St/GT
ESt
IN+
C1
R1
C2
DTMF/CP
INPUT
IN-
R4
GS
R3
R2
D3
VRef
VSS
OSC1
OSC2
TONE
R/W
CS
D2
X-tal
D1
D0
To µP
or µC
IRQ/CP
Φ2
DTMF
OUTPUT
C4
RL
RS0
Notes:
R1, R2 = 100 kΩ 1%
R3 = 374 Ω 1%
R4 = 3.3 kΩ 10%
RL = 10 k Ω (min.)
C1 = 100 nF 5%
C2 = 100 nF 5%
C3 = 100 nF 10%*
C4 = 10 nF 10%
X-tal = 3.579545 MHz
* Microprocessor based systems can inject undesirable noise into
the supply rails. The performance of the MT8880 can be optimized
by keeping noise on the supply rails to a minimum. The decoupling
capacitor (C3) should be connected close to the device and ground
loops should be avoided.
Figure 13 - Application Circuit (Single-Ended Input)
5.0 VDC
5.0 VDC
MMD6150
(or equivalent)
2.4 kΩ
3 kΩ
TEST POINT
TEST POINT
130 pF
24 kΩ
70 pF
MMD7000
(or equivalent)
Test load for D0-D3 pins
Test load for IRQ/CP pin
Figure 14 - Test Circuit
4-43
MITEL [ MITEL NETWORKS CORPORATION ]
