GP2010
Notes on Pin Descriptions
1). Both pins 4 & 6 (V
EE
(OSC)) are connected internally. If the VCO regulator is used (V
CC
= +5.00V nominal) then both pins
4 & 6 must be left floating, with either pin de-coupled to V
CC
(OSC) with a 100nF capacitor. In this configuration, the dc output
level of the regulator can be monitored from V
EE
(OSC), with respect to V
CC
(OSC) - NOT 0V (V
EE
/GND). For operation at
V
CC
<+4.0V, the VCO regulator cannot be used, and both V
EE
(OSC) pins must be shorted to V
EE
(REG) (Pin 7) -
see Fig. 7.
2). The Digital Interface supply is independent from all the other supply pins, allowing supply separation to reduce the likelihood
of undesirable digital signals interfering with the IF strip. (Note the maximum allowable Power Supply Differential in the
Electrical Characteristics - page 4).
3). The 35.42MHz Bandpass filter should have a bandwidth of approx 2.0MHz. Ideally, this should be a DW9255 SAW filter.
CONTROL SIGNALS
Power Down
TEST
L
Normal Operation
Normal Operation
H
Powered Down
Test
Stage 1
Output
175 MHz
Stage 2
Input
175 MHz
Stage 2
Output
35 MHz
Stage 3
Input
35 MHz
M1 - 4 = Matching
Networks, incorporating
Balun transformers
M1
M1
M2
M2
M3
M3
M4
M4
IF
Output
33
RF
INPUT
Cs
29
Stage
1
34
36
37
Stage
Stage
2
2
40
41
43
44
Stage
3
3
1
ADC
CLK
11
13
12
SIGN
MAG
Cp
2
PLL
LOOP
C1
FILTER
3
R1
C2
OPClk
LD
REF 2
TEST
PDn
PRESET PREF
Cagc
14
PLL
SYNTHESISER
15
19
24
18
Power
Down
Power
Detect
9
8
AGC Control
AGC Control
17
21
22
C1 = 470nF
C2 = 10nF
R1 = 270Ω
Cagc = 100nF
Cs = 5pF
Cp = 1.5pF
Fig. 3 GP2010 test circuit
OPERATING NOTES
A typical application circuit is shown in figure 4 with the
GP2010 front-end interfaced to the GP2021 12 channel
correlator integrated circuit. The RF input has an unmatched
input impedance (see page 4). The RF input matching com-
ponents Cs and Cp should be mounted as close to the RF
input as possible: also the Vee(RF) tracks must be kept as
short as possible. A SAW may be used as a 175.42MHz filter,
but this can be replaced by a simpler coupled-tuned LC filter
if there is no critical out-of band jamming immunity require-
ment. The DC bias to mixer 1 is provided via inductors L1 and
L2, which may form part of the 175.42MHz filter. The output
of mixer 2 requires an external dc bias, achieved with inductors
L3 and L4, which also serve to tune out the input capacitance
of the DW9255 SAW filter. The output of the SAW is tuned with
inductor L5. The AGC capacitor (Cagc) determines the AGC
time-constant. The PLL loop filter components are selected to
give a PLL loop bandwidth of approx. 10kHz. The IF Output
is normally used for test-purposes only, but is available to the
user if required. Typically a low noise preamplifier (gain
>+15dB) is used, and may be located with a remote antenna.
QUALITY AND RELIABILITY
At Mitel Semiconductor, quality and reliability are built
into products by rigorous control of all processing operations,
and by minimising random, uncontrolled effects in all manu-
facturing operations. Process management involves full docu-
mentation of procedures, recording of batch-by-batch data,
using traceability procedures, and the provision of appropri-
ate equipment and facilities to perform sample screening and
conformance testing on finished product.
A common information management system is used to
monitor the manufacturing on Mitel Semiconductor CMOS
and Bipolar processes. All products benefit from the use of an
integrated monitoring system throughout all manufacturing
operations, leading to high quality standards for all technolo-
gies.
Further information is contained in the Quality Bro-
chure, available from Mitel Semiconductor Sales Offices.
9
MITEL [ MITEL NETWORKS CORPORATION ]
