PEM
AS28F128J3A
Q-Flash
Functional Block Diagram:
Input
Buffer
I/O
CNTL
Logic
128KB Memory Block (0)
128KB Memory Block (1)
128KB Memory Block (2)
128KB Memory Block (3)
ADDR
Buffer/
Latch
X
Decode
ADDR.
Counter
WRITE
Buffer
Bus
Configuration
Register [BCR]
Power
(Current)
Control
Block
Erase
Control
CEx
OE\
Command
Execution
Logic
WE\
RP\
128KB Memory Block (n)
ISM
DQ0-8 or
DQ0-15
[CEL]
WP\
Y
Dec.
Y - Select
Control
CLK
STS
VPEN
WAIT
Sense Amplifiers
WRITE/ERASE Bit
Compare and
Verify
VPP
Switch
Pump
Status
Register
Identification
Register
Query
Output
Buffer
Additionally, the Scaleable Command Set [SCS] allows a single, VPEN serves as an input with 2.7V, 3.3V or 5V levels for
simple software driver in all host systems to work with all SCS application programming. VPEN in this Q-Flash device can
compliant FLASH memory devices. The SCS provides the provide data protection when connected to ground. This pin
fastest system/device data transfer rates and minimizes the also enables PROGRAM or ERASE LOCKOUT functions/
device and system-level implementation costs.
controls during power transitions.
To optimize the processor-memory interface, the device This device is an even-sectored device architecture offering
accommodates VPEN, which is switchable during BLOCK individual BLOCK LOCKING that can LOCK and UN-LOCK
ERASE, PROGRAM, or LOCK BIT configurations and in a block using the SECTOR LOCK BITS command sequence.
addition can be hard-wired to VCC all dependent on the end
application(s). VPEN is treated as an input pin to enable Status [STS] is a logic signal output that gives an additional
ERASING, PROGRAMMING, and BLOCK LOCKING. indicator of the internal state machine [ISM] activity by
When VPEN is lower than the VCC lockout voltage (VLKO), all providing a hardware signal of both the status and status
program functions are disabled. BLOCK ERASE SUSPEND masking. This status indicator minimizes central processing
mode enables the user to stop BLOCK ERASE to READ unit overhead and system power consumption. In the default
data from or PROGRAM data to any other blocks. Similarly, mode, STS acts as an RY/BY\ pin. When LOW, STS indicates
PROGRAM SUSPEND mode enables the user to SUSPEND that the ISM is performing a BLOCK ERASE, PROGRAM,
PROGRAMMING to READ data or execute code from any or LOCK BIT configuration. When HIGH, STS indicates that
un-suspended block(s).
the ISM is ready for a new command.
Micross Components reserves the right to change products or specifications without notice.
AS28F128J3A
Rev. 5.8 8/13
2
MICROSS [ MICROSS COMPONENTS ]
