SRAM
AS8S128K32
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55°C≤TA≤125°C; Vcc = 5v ±10%)
-15
-17
-20
-25
-35
-45
DESCRIPTION
READ CYCLE
SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
tRC
READ cycle time
15
17
20
25
35
45
ns
ns
ns
ns
ns
ns
tAA
tACE
tOH
Address access time
15
15
17
17
20
20
25
25
35
35
45
45
Chip enable access time
Output hold from address change
Chip enable to output in Low-Z
Chip disable to output in High-Z
Chip enable to power-up time
Chip disable to power-down time
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
2
2
2
2
2
2
2
2
2
2
2
2
tLZCE
tHZCE
tPU
4, 6, 7
7
8
9
10
14
15
4, 6, 7
0
0
0
0
0
0
0
0
0
0
0
0
4
4
tPD
15
6
17
7
20
7
25
8
35
12
45
12
tAOE
tLZOE
tHZOE
ns
ns
ns
4, 6
6
7
7
9
12
12
4, 6, 7
tWC
tCW
tAW
tAS
WRITE cycle time
15
12
12
0
17
12
12
0
20
15
15
0
25
17
17
0
35
20
20
0
45
22
22
0
ns
ns
ns
ns
ns
Chip enable to end of write
Address valid to end of write
Address setup time
tAH
Address hold from end of write
1
1
1
1
1
1
1
1
tWP1
WRITE pulse width
12
12
15
17
20
20
ns
1
1
tWP2
WRITE pulse width
12
8
12
9
15
10
1
17
12
1
20
15
1
20
15
1
ns
ns
ns
ns
ns
tDS
Data setup time
tDH
Data hold time
1
1
tLZWE
tHZWE
Write disable to output in Low-z
Write enable to output in High-Z
2
2
2
2
2
2
4, 6, 7
4, 6, 7
7
9
10
11
14
15
NOTES:
t
1) For OE\ = HIGH condition. For OE\ = LOW condition WP1 = tWP2 = 15 ns MIN.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
4