SRAM
AS8S128K32
Austin Semiconductor, Inc.
128K x 32 SRAM
PIN ASSIGNMENT
(Top View)
SRAM MEMORY ARRAY
68 Lead CQFP (Q)
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-95595: -Q
• SMD 5962-93187: -P or -PN
• MIL-STD-883
FEATURES
• Access times of 15, 17, 20, 25, 35, and 45 ns
• Built in decoupling caps for low noise operation
• Organized as 128K x32; User configured as
256Kx16 or 512K x8
• Operation with single 5 volt supply
• Low power CMOS
• TTL Compatible Inputs and Outputs
• 2V Data Retention, Low power standby
66 Lead PGA- Pins 8, 21, 28, 39 are grounds (P)
OPTIONS
MARKINGS
•
Timing
15ns
-15
-17
-20
-25
-35
-45
17ns
20ns
25ns
35ns
45ns
•
Package
Ceramic Quad Flatpack
Pin Grid Array -8 Series
Pin Grid Array -8 Series
Q
P
PN
No. 702
No. 802
No. 802
66 Lead PGA- Pins 8, 21, 28, 39 are no connects (PN)
NOTE: PN indicates a no connect on pins 8, 21, 28, 39
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8S128K32 is a 4 Mega-
bit CMOS SRAM Module organized as 128Kx32-bits and user
configurable to 256Kx16 or 512Kx8. The AS8S128K32 achieves
high speed access, low power consumption and high reliability
by employing advanced CMOS memory technology.
The military temperature grade product is suited for mili-
tary applications.
CE4
The AS8S128K32 is offered in a ceramic quad flatpack mod-
ule per SMD-5962-95595 with a maximum height of 0.140 inches.
This module makes use of a low profile, mutlichip module de-
sign.
WE4
M3
CE3
WE3
M2
I/O 24 - I/O 31
This device is also offered in a 1.075 inch square ceramic
pin grid array per SMD 5692-93187, which has a maximum height
of 0.195 inches. This package is also a low profile, multi-chip
module design reducing height requirements to a minimum.
CE2
M1
WE2
I/O 16 - I/O 23
CE1
M0
WE1
I/O 8 - I/O 23
OE
A0 - 16
For more products and information
please visit our web site at
I/O 0 - I/O 7
www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
1