PRODUCT DATABOOK 1996/1997
LX8384-xx/8384A-xx/8384B-xx
5 A L
O W
D
R O P O U T
P
O S I T I V E
R
E G U L AT O R S
P
R O D U C T I O N
D
A T A
S
H E E T
A P P L I C AT I O N N O T E S
OVERLOAD RECOVERY
(continued)
the voltage will stabilize at some lower value, and will
never
reach
the designed value. Under these circumstances, it may be necessary
to cycle the input voltage down to zero in order to make the
regulator output voltage return to regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor should
be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R1
at the ripple frequency.
The
capacitor value can be determined by using this equation:
C = 1 / (6.28 * F
R
* R1)
where: C
≡
the value of the capacitor in Farads;
select an equal or larger standard value.
F
R
≡
the ripple frequency in Hz
R1
≡
the value of resistor R1 in ohms
LX8384/84A/84B
OUT
IN
ADJ
I
ADJ
50µA
V
OUT
= V
REF
1 + R2 + I
ADJ
R2
R1
R2
V
IN
V
OUT
V
REF
R1
FIGURE 2
— BASIC ADJUSTABLE REGULATOR
LOAD REGULATION
Because the LX8384/84A/84B regulators are three-terminal devices,
it is not possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire connecting
the regulator to the load. The data sheet specification for load
regulation is measured at the bottom of the package. Negative side
sensing is a true Kelvin connection, with the bottom of the output
divider returned to the negative side of the load. Although it may
not be immediately obvious, best load regulation is obtained when
the top of the resistor divider, (R1), is connected
directly
to the case
of the regulator,
not to the load.
This is illustrated in Figure 3. If R1
were connected to the load, the effective resistance between the
regulator and the load would be:
R
Peff
= R
P
*
At a ripple frequency of 120Hz, with R1 = 100Ω:
C = 1 / (6.28 * 120Hz * 100Ω) = 13.3µF
The closest equal or larger standard value should be used, in this
case, 15µF.
When an ADJ pin bypass capacitor is used, output ripple
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
M = V
OUT
/V
REF
where: M
V
REF
≡
a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
= 1.25V.
R2+R1
R1
where: R
P
≡
Actual parasitic line resistance.
When the circuit is connected as shown in Figure 3, the parasitic
resistance appears as its actual value, rather than the higher R
Peff
.
R
P
Parasitic
LX8384/84A/84B
Line Resistance
OUT
IN
Connect
ADJ
R1
R2
R
L
Connect
R2
to Load
For example, if V
OUT
= 2.5V the output ripple will be:
M = 2.5V/1.25V= 2
Output ripple will be twice as bad as it would be if the ADJ pin
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
The LX8384/84A/84B ICs develop a 1.25V reference voltage
between the output and the adjust terminal (See Figure 2). By
placing a resistor, R1, between these two terminals, a constant
current is caused to flow through R1 and down through R2 to set
the overall output voltage. Normally this current is the specified
minimum load current of 10mA. Because I
ADJ
is very small and
constant when compared with the current through R1, it represents
a small error and can usually be ignored.
V
IN
R1 to Case
of Regulator
FIGURE 3
— CONNECTIONS FOR BEST LOAD REGULATION
6
Copyright © 1997
Rev. 1.9 12/97
MICROSEMI [ MICROSEMI CORPORATION ]
