DATA SHEET
VSP 94x2A
2
Table 3–8: I C bus command description, continued
Bit
Subaddress 7Dh
BELLFIR
Name
Description
D6-D4
D3-D1
D0
Bell filter FIR component
‘000’: −116
‘001’: −113
‘010’: −110
‘011’: −108
‘100’: −106
‘101’: −104
‘110’: −102
‘111’: −100
[CP-CD]
BELLIIR
[CP-CD]
Bell filter IIR component
‘000’: 8
‘001’: 9
‘010’: 10
‘011’: 11
‘100’: 12
‘101’: 13
‘110’: 14
‘111’: 16
VFLYWHL
[CP-CD]
Vertical Flywheel
‘0’: disabled
‘1’: enabled
Subaddress 7Eh
D7-D6
FLNSTRD
[CP-CD]
Force line standard at CVBS/RGB frontend
‘00’: automatic
‘01’: force 50 Hz
‘10’: force 60 Hz
‘11’: (reserved)
D5
ENLIM
[CP-CD]
Enable limiter
‘0’: disabled
‘1’: enabled
D4-D3
ISHFT
I-adjustment for horizontal PLL
[CP-CD]
‘00’: *1
‘01’: *2
‘10’: *4
‘11’: *8
D2
NSRED2
[CP-CD]
Belongs to 72h
D1-D0
VLP
Lowpass for vertical sync-separation
[CP-CD]
‘00’: none
‘01’: weak
‘10’: medium
‘11’: strong
Micronas
Aug. 16, 2004; 6251-552-1DS
85
MICRONAS [ MICRONAS ]
