PRELIMINARY DATA SHEET
VDP 31xxB
4. Specifications
4.1. Outline Dimensions
SPGS0016-4/3E
64
33
32
1
±0.1
19.3
±0.1
±0.1
18
57.7
±0.06
0.27
±0.5
±0.1
20.1
1
0.457
±0.05
1.778
31 x 1.778 = 55.118
±0.1
1.29
Fig. 4–1:
64-Pin Plastic Shrink Dual-Inline Package
(PSDIP64)
Weight approximately 9.0 g
Dimensions in mm
4.2. Pin Connections and Short Descriptions
NC = not connected; leave vacant
LV = if not used, leave vacant
X = obligatory; connect as described in circuit diagram
Pin No.
Pin Name
Type
Connection
(if not used)
Short Description
1
2
3
4
5
6
TEST
RESQ
SCL
IN
GND
X
Test Pin, reserved for Test
Reset Input, Active Low
DF
IN
2
IN/OUT
IN/OUT
X
I C Bus Clock
2
SDA
X
I C Bus Data
DSGND
X
Digital Shield GND
D
PORT0
HCS
IN/OUT
IN/OUT
LV
IO Port Expander 0
/ Half Contrast Switch
7
PORT1
FSY
LV
IO Port Expander 1
/ Front Sync Output
8
CSY
OUT
OUT
OUT
IN
LV
Composite Sync Output
Main Sync Output
9
MSY
LV
10
11
12
13
INTLC
VPROT
SAFETY
HFLB
LV
Interlace Control Output
Vertical Protection Input
Safety Input
GND
O
O
IN
GND
IN
HOUT
Horizontal Flyback Input
Micronas
47