欢迎访问ic37.com |
会员登录 免费注册
发布采购

VDP3130Y 参数 Datasheet PDF下载

VDP3130Y图片预览
型号: VDP3130Y
PDF下载: 下载PDF文件 查看货源
内容描述: 视频处理器家族 [Video Processor Family]
分类和应用:
文件页数/大小: 76 页 / 1707 K
品牌: MICRONAS [ MICRONAS ]
 浏览型号VDP3130Y的Datasheet PDF文件第51页浏览型号VDP3130Y的Datasheet PDF文件第52页浏览型号VDP3130Y的Datasheet PDF文件第53页浏览型号VDP3130Y的Datasheet PDF文件第54页浏览型号VDP3130Y的Datasheet PDF文件第56页浏览型号VDP3130Y的Datasheet PDF文件第57页浏览型号VDP3130Y的Datasheet PDF文件第58页浏览型号VDP3130Y的Datasheet PDF文件第59页  
ADVANCE INFORMATION  
VDP 313xY  
3.3. Pin Descriptions  
Pin 1824 IO Port Expander, PORT[6:0] (Fig. 321,  
Fig. 322)  
Pin 1 Test Input, TEST (Fig. 33)  
This pin enables factory test modes. For normal opera-  
tion it must be connected to ground.  
These pins provide an I2C programmable I/O port,  
which can be used to read and write slow external sig-  
nals.  
Pin 2 Reset Input, RESQ (Fig. 34)  
Pin 25 Ground (Digital Shield), GNDD.  
A low level on this pin resets the VDP31xxY.  
Pin 26, 27 Range Switch for Measurement ADC,  
RSW1, RSW2 (Fig. 318)  
These pins are open drain pull-down outputs. RSW1 is  
switched off during cutoff and whitedrive measure-  
ment. RSW2 is switched off during cutoff measure-  
ment only.  
Pin 3 I2C Bus Clock, SCL (Fig. 34)  
This pin connects to the I2C bus clock line.  
Pin 4 I2C Bus Data, SDA (Fig. 34)  
This pin connects to the I2C bus data line.  
Pin 5 Ground (Digital Shield), GNDD  
Pin 28 Measurement ADC Input, SENSE (Fig. 319)  
This is the input of the analog digital converter for the  
picture and tube measurement.  
Pin 6 Half Contrast Switch Input, HCS (Fig. 322)  
Via this input pin the output level of the analog RGB  
output pins can be reduced by 6 dB.  
Pin 29 Ground (Measurement ADC Reference  
Input), GNDM  
Pin 7 Front Sync Output, FSY (Fig. 321)  
This pin supplies the front sync information  
This is the ground reference for the measurement A/D  
converter.  
Pin 8 Composite Sync Output, CSY (Fig. 321)  
This output supplies a standard composite sync signal  
that is compatible to the analog RGB output signals.  
Pin 30 Vertical Sawtooth Output Q, VERTQ  
(Fig. 316)  
This pin supplies the drive signal for the vertical output  
stage. The drive signal is generated with 15-bit preci-  
sion by the Fast Processor in the front-end. The analog  
voltage is generated by a 4-bit current-DAC with exter-  
nal registor and uses digital noise shaping.  
Pin 9 Vertical Sync Output, VS (Fig. 321)  
This pin supplies the vertical sync information.  
Pin 10 Interlace Output, INTLC (Fig. 321)  
This pin supplies the interlace information, with pro-  
grammable polarity.  
Pin 31 Vertical Sawtooth Output, VERT (Fig. 316)  
This pin supplies the inverted signal of pin 30.  
Together with pin 30 it can be used to drive symmetri-  
cal deflection amplifiers.  
Pin 11 Vertical Protection Input, VPROT (Fig. 314)  
The vertical protection circuitry prevents the picture  
tube from burn-in in the event of a malfunction of the  
vertical deflection stage. During vertical blanking, a  
signal level of 2.5 V is sensed. If a negative edge can-  
not be detected, the RGB output signals are blanked.  
Pin 32 EastWest Parabola Output, EW (Fig. 317)  
This pin supplies the parabola signal for the East-West  
correction. The drive signal is generated with 15 bit  
precision by the Fast Processor in the front-end. The  
analog voltage is generated by a 4-bit current-DAC  
with external resistor and uses digital noise shaping.  
Pin 12 Safety Input, SAFETY (Fig. 314)  
This is a three-level input. Low level means normal  
function. At the medium level RGB signals are blanked  
and at high level RGB signals are blanked and hori-  
zontal drive is shut off.  
Pin 33 DAC Current Reference, XREF (Fig. 320)  
External reference resistor for DAC output currents,  
typical 10 kto adjust the output current of the D/A  
converters. (see recommended operating conditions).  
This resistor has to be connected to analog ground as  
closely as possible to the pin without any capacitor.  
Pin 13 Horizontal Flyback Input, HFLB (Fig. 314)  
Via this pin the horizontal flyback pulse is supplied to  
the VDP 313xY.  
Pin 34 Scan Velocity Modulation Output, SVMOUT  
(Fig. 312)  
This output delivers the analog SVM signal. The D/A  
converter is a current sink like the RGB D/A convert-  
ers. At zero signal the output current is 50 % of the  
maximum output current.  
Pin 14 Ground (Digital Circuitry Front-end), GNDD  
Pin 15, 17Supply Voltage (Digital Circuitry), VSUPD  
Pin 16 Ground (Digital Circuitry Back-end), GNDD  
Pin 35 Ground (Analog Back-end), GNDAB  
Pin 36 Supply Voltage (Analog Back-end), VSUPAB  
Micronas  
55