ADVANCE INFORMATION
VCT 38xxA
PH2
RW
internal signal
internal signal
ADB
DB
extern
extern
intern
intern
Controlword
DISEXT= 1
OE
WE
DB
Controlword
DISEXT= 0
OE
WE
Fig. 5–2: Internal/external memory access
5.5. Standby Registers
The Standby registers allow the user to switch on/off
power or clock supply of single modules. With these
flags it is possible to greatly influence power consump-
tion and its related electromagnetic interference.
CCC
r/w1:
r/w0:
Capture Compare Counter
Module active.
Module off.
TVPWM
r/w1:
r/w0:
Tuning Voltage Pulse Width Modulator
Module active.
Module off.
For details about enabling and disabling procedures
and the standby state refer to the specific module
descriptions.
The minimum IC current consumption is obtained with
all standby registers set to 00h.
7: 1F09
8: SR1
9: Standby Register 1
bit
r/w
7
6
5
0
4
0
3
ADC
0
2
1
TIM1
0
0
TIM0
0
CPUFST
reset
0
1
0
4: 1F08
5: SR0
6: Standby Register 0
bit
7
6
5
PWM0
0
4
0
3
2
TRAM
0
1
CCC
0
0
TVPWM
0
CPUFST
r/w1:
r/w0:
CPU Fast Mode
Fast mode: fCPU = fXTAL / 2
Slow mode: fCPU = fXTAL / 512
r/w
PWM1
reset
0
0
0
PWM1
r/w1:
r/w0:
Pulse Width Modulator 1
Module active.
Module off.
ADC
r/w1:
r/w0:
ADC Module
Module active.
Module off.
PWM0
r/w1:
r/w0:
Pulse Width Modulator 0
Module active.
Module off.
TIM1
r/w1:
r/w0:
Timer 1
Module active.
Module off.
TRAM
r/w1:
r/w0:
Text RAM
Module active
Module off
TIM0
r/w1:
r/w0:
Timer 0
Module active.
Module off.
Micronas
89
MICRONAS [ MICRONAS ]
