VCT 38xxA
ADVANCE INFORMATION
5.14.5.CAPCOM Registers
This flag is static. As long as FOL is true neither com-
parator can trigger nor SW can force, by writing
another “one”, the Output Action logic. After forcing it is
recommended to clear FOL unless Output Action logic
should not be locked.
226: 1F7C
227: CCCL
228: CAPCOM Counter Low Byte
bit
7
6
5
4
3
2
1
0
r
Read Low Byte and lock CCC.
OAM
Output Action Mode
reset
0
0
0
0
0
0
0
0
r/w:
Defines behavior of Output Action logic.
IAM
r/w:
Input Action Mode
Defines behavior of Input Action logic.
229: 1F7D
230: CCCH
231: CAPCOM Counter High Byte
bit
r
7
6
5
4
3
2
1
0
Read High Byte and unlock CCC.
Table 5–17: OAM usage
reset
0
0
0
0
0
0
0
0
The CAPCOM module counter has to be read Low
byte first to avoid inconsistencies.
OAM Output Action Logic Modes
0 0
0 1
1 0
1 1
Disabled, ignore trigger, output Low level.
Toggle output.
232: 1F14
233: CCCS
234: CAPCOM Clock Select
bit
7
6
5
4
0
3
2
1
0
0
Output Low level.
Output High level.
w
CSF
reset
0
0
0
0
0
0
CSF
w:
Clock Selection Field
Source of CCC clock (see Table 5–16)
Table 5–18: IAM usage
Table 5–16: CSF usage
IAM
0 0
0 1
1 0
1 1
Input Action Logic Modes
CSF
Clock
Divider
Timer
Clock
Timer
Increment
Timer
Period
Disabled, don’t trigger.
0
00
01
10
11
f
f
f
f
/2
/2
/2
/2
10.125 MHz
632.81 KHz
39.551 KHz
2.4719 KHz
98.765 ns
1.5802 µs
25.284 µs
404.54 µs
6.4727 ms
103.56 ms
1.6570 s
OSC
OSC
OSC
OSC
Trigger on rising edge.
4
Trigger on falling edge.
8
Trigger on rising and falling edge.
12
26.512 s
235: 1F6C
238: 1F70
236: CC0M
239: CC1M
237: CAPCOM 0 Mode Register
240: CAPCOM 1 Mode Register
bit
7
6
5
MSK
0
4
FOL
0
3
2
1
0
0
r
MSK
MSK
OAM
IAM
reset
0
0
0
0
0
MSK
w1:
Mask Flag
Enable.
w0:
Disable.
These mask flags refer to the corresponding event
flags in CAPCOM interrupt register.
FOL
r/w1:
r/w0:
Force Output Action Logic
Force Output Action logic.
Release Output Action logic.
118
Micronas
MICRONAS [ MICRONAS ]
