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VCT3803A 参数 Datasheet PDF下载

VCT3803A图片预览
型号: VCT3803A
PDF下载: 下载PDF文件 查看货源
内容描述: 视频/控制/图文电视IC系列 [Video/Controller/Teletext IC Family]
分类和应用: 电视
文件页数/大小: 172 页 / 2219 K
品牌: MICRONAS [ MICRONAS ]
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ADVANCE INFORMATION  
VCT 38xxA  
5.13.Timer T0 and T1  
5.13.1.Features  
– 16-bit auto reload counter  
– Time value readable  
– Interrupt source output  
– Frequency output  
Timer T0 and T1 are 16-bit auto reload down counters.  
They serve to deliver a timing reference signal, to out-  
put a frequency signal or to produce time stamps.  
TIM x  
w
r
Reload-reg.  
f
OSC/21  
0
1
clk  
3:1  
MUX  
16  
fOSC/29  
fOSC/217  
TIM x  
zero  
Tx  
Interrupt  
Source  
16 bit Auto-reload  
Down counter  
2
SR1.TIMx  
TIMxM.CSF  
Tx-OUT  
1/2  
Fig. 5–22: Block diagram of timer T0 and T1  
5.13.2.Operation  
The interrupt source output of this module is routed to  
the Interrupt Controller logic (see Section 5.10. on  
page 99).  
The timer’s 16-bit down-counter is clocked by the input  
clock and counts down to zero. Reaching zero, it gen-  
erates an output pulse, reloads with the content of the  
TIMx reload register and restarts its travel.  
The state of the down-counter is readable by reading  
the 16-bit register TIMx, Low byte first. Upon reading  
the Low byte, the High byte is saved to a temporary  
latch, which is then accessed during the subsequent  
High byte read.  
T0 and T1 are not affected by CPU Slow mode.  
The clock input frequency can be selected from three  
possible values by programming the timer mode regis-  
ter TIMxM.CSF. After reset, both timers are in standby  
mode (inactive).  
Thus, for time stamp applications, read consistency  
between Low and High byte is guaranteed.  
Returning a timer to standby mode by resetting the  
corresponding Enable bit will halt its counter and will  
set its output to Low. The register TIMx remains  
unchanged.  
Prior to entering active mode, proper SW initialization  
of the Ports assigned to function as Tx-OUT outputs  
has to be made. The ports have to be configured Spe-  
cial Out (see Section 5.18. on page 126).  
To initialize a timer, Reload register TIMx has to set to  
the desired time value, still in standby mode. For enter-  
ing active mode, set the corresponding enable bit in  
the Standby register. The timer will immediately start  
counting down from the time value present in register  
TIMx.  
During active mode, a new time value is loaded by writ-  
ing to the 16-bit register TIMx, High byte first. Upon  
writing the Low byte, the reload register is set to the  
new 16-bit value, the counter is reset, and immediately  
starts down-counting with the new value.  
On reaching zero, the counter generates a reload sig-  
nal, which can be used to trigger an interrupt. The  
same signal is connected to a divide by two scaler to  
generate the output signal Tx-OUT with a pulse duty  
factor of 50 %.  
Micronas  
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