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VCT3801A 参数 Datasheet PDF下载

VCT3801A图片预览
型号: VCT3801A
PDF下载: 下载PDF文件 查看货源
内容描述: 视频/控制/图文电视IC系列 [Video/Controller/Teletext IC Family]
分类和应用: 电视
文件页数/大小: 172 页 / 2219 K
品牌: MICRONAS [ MICRONAS ]
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ADVANCE INFORMATION  
VCT 38xxA  
Table 2–7: Control Registers of the Fast Processor for control of the video backend functions  
default values are initializied at reset  
FP Sub-  
address  
Function  
Default  
Name  
FP Display Control Register  
(0...1023)  
h’130  
h’131  
h’132  
h’139  
White Drive Red  
White Drive Green  
White Drive Blue  
700 WDR 1)  
700 WDG 1)  
700 WDB 1)  
256 IBR  
(0...1023)  
(0...1023)  
Internal Brightness, Picture (0...511), the center value is 256, the range  
allows for both increase and reduction of brightness.  
h’13c  
Internal Brightness, Measurement (0...511), the center value is 256, the  
brightness for measurement can be set to measure at higher cutoff cur-  
rent. The measurement brightness is independent of the drive values.  
256 IBRM  
h’13a  
h’13b  
Analog Brightness for external RGB (0...511), the center value is 256, the  
range allows for both increase and reduction of brightness.  
256 ABR  
350 ACT  
Analog Contrast for external RGB (0...511)  
1) The white drive values will become active only after writing the blue value WDB, latching of new values is indi-  
cated by setting the MSB of WDB.  
FP Display Control Register, BCL  
h’144  
h’142  
h’143  
h’145  
h’105  
BCL threshold current, 0...2047 (max ADC output ~1152)  
BCL time constant 0...15 13 ... 1700 msec  
BCL loop gain. 0..15  
1000 BCLTHR  
15 BCLTM  
0
BCLG  
BCL minimum contrast 0...1023  
307 BCLMIN  
Test register for BCL/EHT comp. function, register value:  
0
BCLTST  
0
1
normal operation  
stop ADC offset compensation  
x>1 use x in place of input from Measurement ADC  
FP Display Control Register, Deflection  
h’103  
h’102  
interlace offset, 2048..2047  
This value is added to the SAWTOOTH output during one field.  
0
7
INTLC  
DSCC  
discharge sample count for deflection retrace,  
SAWTOOTH DAC output impedance is reduced for DSCC lines after ver-  
tical retrace.  
h’11f  
vertical discharge value,  
1365 DSCV  
SAWTOOTH output value during discharge operation, typically same as  
A0 init value for sawtooth.  
h’10b  
h’10a  
h’10f  
EHT compensation vertical gain coefficient, 0...511  
0
EHTV  
EHT compensation time constant, 0...15 --> 3.2..410 msec  
EHT compensation east/west gain coefficient, 1024...1023  
15 EHTTM  
15 EHTEW  
Micronas  
45  
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