ADVANCE INFORMATION
VCT 38xxA
FP Sub-
address
Function
Default
Name
FP Status
h’12
general purpose control bits
GPC
bit[2:0]
bit[3]
bit[8:4]
bit[9]
reserved, do not change
vertical standard force
reserved, do not change
disable flywheel interlace
reserved, do not change
0
VFRC
DFLW
1
bit[11:10]
to enable vertical free run mode set vfrc to 1 and dflw to 0
h’13
standard recognition status
−
ASR
bit[0]
bit[1]
bit[2]
bit[3]
bit[4]
bit[5]
bit[6]
bit[7]
bit[8]
bit[9]
bit[11:10]
1
1
vertical lock
horizontally locked
no signal detected
color amplitude killer active
disable amplitude killer
color ident killer active
disable ident killer
1
1
1
1
1
1
1
interlace detected
no vertical sync detection
spurious vertical sync detection
reserved
h’14
h’cb
h’15
h’74
h’36
h’f0
input noise level
read only NOISE
read only NLPF
VCNT
number of lines per field, P/S: 312, N: 262
vertical field counter, incremented per field
measured sync amplitude value, nominal: 768 (PAL), 732 (NTSC)
measured burst amplitude
read only SAMPL
read only BAMPL
read only SW_VERSION
firmware version number
bit[7:0]
bit[11:8]
internal revision number
firmware release
h’170
status of macrovision detection
read only MCV_STATUS
bit[0]
bit[1]
AGC pulse detected
pseudo sync detected
h’171
h’172
bit[11:0]
bit[11:0]
first line of macrovision detection window
last line of macrovision detection window
Horizontal Scaler
6
MCV_START
MCV_STOP
15
1) these registers are updated when the scaler mode register is written
h’40
scaler mode register
0
SCMODE
MODE
bit[1:0]
scaler mode
0
1
2
3
linear scaling mode
nonlinear scaling mode, ’panorama’
nonlinear scaling mode, ’waterglass’
reserved
bit[10:2]
bit[11]
reserved, set to 0
scaler update
SCUP
0
start scaler update command,
when the registers are updated the bit is set to 1
Micronas
43
MICRONAS [ MICRONAS ]
