VCT 38xxA
ADVANCE INFORMATION
2.10.9.RGB Processing
a)
After adding the post-processed luma, the digital RGB
signals are limited to 10 bits. Three multipliers are
used to digitally adjust the white drive. Using the same
multipliers an average beam current limiter is imple-
mented (see Section 2.11.1. on page 25).
Cr in
Cb in
t
t
t
2.10.10.OSD Color Look-up Table
b)
The VCT 38xxA has five input lines for an OSD signal.
This signal forms a 5-bit address for a color look-up
table (CLUT). The CLUT is a memory with 32 words
where each word holds a RGB value.
Ampl.
Bits 0 to 3 (bit 4=0) form the addresses for the ROM
part of the OSD, which generates full RGB signals (bit
0 to 2) and half-contrast RGB signals (bit 3).
c)
Cr out
Cb out
Bit 4 addresses the RAM part of the OSD with 16
freely programmable colors, addressable with bit 0 to
3. The programming is done via the I2C bus.
The amplitude of the CLUT output signals can be
adjusted separately for R, G, and B via the I2C bus.
The switchover between video RGB and OSD RGB is
done via the priority decoder.
a) CrCb input of DTI
b) CrCb input + correction signal
c) sharpened and limited CrCb
Fig. 2–16: Digital color transient improvement
2.10.11.Picture Frame Generator
When the picture does not fill the total screen (height
or width too small) it is surrounded with black areas.
These areas (and more) can be colored with the pic-
ture frame generator. This is done by switching over
the RGB signal from the matrix to the signal from the
OSD color look-up table.
2.10.8.Inverse Matrix
A 6-multiplier matrix transcodes the Cr and Cb signals
to R-Y, B-Y, and G-Y. The multipliers are also used to
adjust color saturation in the range of 0 to 2. The coef-
ficients are signed and have a resolution of 9 bits.
There are separate matrix coefficients for main and
side pictures. The matrix computes:
The width of each area (left, right, upper, lower) can be
adjusted separately. The generator starts on the right,
respectively lower side of the screen and stops on the
left, respectively upper side of the screen. This means,
it runs during horizontal, respectively vertical flyback.
The color of the complete border can be stored in the
programmable OSD color look-up table in a separate
address. The format is 3 x 4-bit RGB. The contrast can
be adjusted separately.
R−Y= MR1*Cb+MR2*Cr
G−Y= MG1*Cb+MR2*Cr
B−Y= MB1*Cb+MR2*Cr
The initialization values for the matrix are computed
from the standard ITUR (CCIR) matrix:
The picture frame generator includes a priority master
circuit. Its priority is programmable and the border is
generated only if the priority is higher than the priority
of the other sources (video/OSD). Therefore, the bor-
der can be underlay or overlay depending on the pic-
ture source.
R
G
B
1
1
1
0
1.402
−0.713
0
Y
Cb
Cr
−0.345
1.773
=
For a contrast setting of CTM+32, the matrix values
are scaled by a factor of 64 (see Table 2–4 on
page 34).
22
Micronas
MICRONAS [ MICRONAS ]
