ADVANCE INFORMATION
VCT 38xxA
2.10.12.Priority Decoder
2.10.13.Scan Velocity Modulation
The priority decoder selects the picture source
depending on the programmed priorities. Up to eight
levels can be selected for OSD and the picture frame –
where 0 is the highest. The video source always has
the lowest priority. A 5-bit information is attached to
each priority (see Table 2–4 on page 34). These bits
are programmable via the I2C bus and have the follow-
ing meanings:
The RGB input signal of the SVM is converted to Y in a
simple matrix. Then the Y signal is differentiated by a
filter of the transfer function 1-Z-N, where N is program-
mable from 1 to 6. With a coring, some noise can be
suppressed. This is followed by a gain adjustment and
an adjustable limiter. The analog output signal is gen-
erated by an 8-bit D/A converter.
The signal delay can be adjusted by ±3.5 clocks in
half-clock steps. For the gain and filter adjustment
there are two parameter sets. The switching between
these two sets is done with the same RGB switch sig-
nal that is used for switching between video-RGB and
OSD-RGB for the RGB outputs (see Fig. 2–17).
– one of two contrast, brightness and matrix values for
main and side picture
– RGB from video signal or color look-up table
– disable/enable black-level expander
– disable/enable peaking transient suppression when
signal is switched
– disable/enable analog Fast-Blank input
RGB Switch
R
G
B
Coring
Gain1
Gain2
N1
N2
Limit
Delay
Matrix and
Shaping
Modulation
Notch
Differen-
tiator
Output
Delay
adjustment
D/A
Converter
Coring
adjustment
Gain
adjustment
Limiter
-Nx
1-Z
Fig. 2–17: SVM Block diagram
2.10.14.Display Phase Shifter
A phase shifter is used to partially compensate the
phase differences between the video source and the
flyback signal. By using the described clock system,
this phase shifter works with an accuracy of approxi-
mately 1 ns. It has a range of 1 clock period which is
equivalent to ±24.7 ns at 20.25 MHz. The large
amount of phase shift (full clock periods) is realized in
the front-end circuit.
Micronas
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