TPU 3035, TPU 3040
PRELIMINARY DATA SHEET
Table 1–1, continued
TPU
Display
3035
3040
TPU
3035
3040
Memory
No. of different characters
No. of national language char. sets
Character matrix size
No. of display rows
512
512
No. of pages on-chip
No. of pages off-chip
Minimum DRAM (ext.)
Maximum DRAM (ext.)
DRAM organization
–
–
16
16
112
2032
10x10
10x10
256 Kbit 256 Kbit
> 26
> 26
1 Mbit
1 bit
90
16 Mbit
Pixel graphics
–
–
–
–
–
x
x
x
1 bit
90
x
16:9 display (25% shrink)
1/2 screen display (50% shrink)
DRAM access (ns, page mode)
Automatic memory/config. check
x
1/2 screen 16:9 display
(62.5% shrink)
Var. no. of subpages
(internal subpage management)
x
x
32 kHz mode
–
x
x
–
x
–
x
x
–
x
x
x
x
x
x
–
x
x
–
x
Constant page access time
Dyn. pg. storage (datacompression)
General Product Info
Supply voltage [V]
x
x
Noninterlace display
50/60 Hz display
–
–
100/120 Hz display
Scrolling vertical
5
250
I2C
–
5
250
I2C
–
Power dissipation [mW]
Control bus
Scrolling horizontal
Double height page display
Status row single height
Two page display side by side
IR decoder and control
Software macro interface
System clock [MHz]
Package
x
x
20.25
20.25
Stable (line locked) display with
noisy video
PDIP40 PLCC44
PDIP40
Display synchronized by input video
75 Ohm output
–
–
x
–
–
–
–
x
–
–
No. of ICs for complete solution
(without external DRAM)
1
1
Technology
0.8 µm
CMOS
0.8 µm
CMOS
Half contrast RGB out
RGB level adjustable (externally)
Level 3
Level 2
Level 2
Level 2
Level 2
DRCS
CLUT
(D3000) (D3000)
double width
double height
full screen color
x
x
x
x
x
x
x
x
OSD – layer independent
Display priority via software-ID
(D3000) (D3000)
RGB input from SCART and Fast
Blank interface
x
x
Hardware cursor
–
–
MICRONAS INTERMETALL
5
MICRONAS [ MICRONAS ]
