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SDA9380-B21 参数 Datasheet PDF下载

SDA9380-B21图片预览
型号: SDA9380-B21
PDF下载: 下载PDF文件 查看货源
内容描述: EDDC增强偏转器和RGB处理器 [EDDC Enhanced Deflection Controller and RGB Processor]
分类和应用: 商用集成电路
文件页数/大小: 72 页 / 404 K
品牌: MICRONAS [ MICRONAS ]
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SDA 9380 - B21  
Preliminary Data Sheet  
System description  
Min. No. of lines / field:  
It defines the minimum number of lines per field for the vertical synchroniza-  
tion. If the TV standard at the inputs VSYNC and HSYNC has less lines per  
field than defined by Min. No. of lines / field no synchronization is possible.  
The relationship between Min. No. of lines / field and the minimum number  
of lines is given in the following table:  
Min. No. of lines / minimum number  
field  
of lines per field  
0
192  
194  
...  
1
...  
127  
128  
...  
446  
448  
...  
254  
255  
700  
702  
Max. No. of lines / field:  
It defines the maximum number of lines per field for the vertical synchroniza-  
tion. If the TV standard at the inputs VSYNC and HSYNC has more lines per  
field than defined by Max. No. of lines / field no synchronization is possible.  
The relationship between Max. No. of lines / field and the maximum number  
of lines is given in the following table:  
Max. No. of lines / maximum number  
field  
of lines per field  
0
1
702  
192  
194  
...  
2
...  
127  
128  
...  
444  
446  
...  
255  
700  
Average beam current limit:  
Brightness and contrast is reduced when the average beam current limit level  
is exceeded. The beam current is measured at pin IBEAM. High voltage at this  
input indicates low beam current, low voltage high beam current. The limit  
range of -128 to 127 complies to a voltage at IBEAM of 2.5 to 0.84V at RIBM =  
0 and 2.63 to 2.08V at RIBM = 1.  
Micronas  
5-34  
2001-01-29  
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