欢迎访问ic37.com |
会员登录 免费注册
发布采购

SDA9380-B21 参数 Datasheet PDF下载

SDA9380-B21图片预览
型号: SDA9380-B21
PDF下载: 下载PDF文件 查看货源
内容描述: EDDC增强偏转器和RGB处理器 [EDDC Enhanced Deflection Controller and RGB Processor]
分类和应用: 商用集成电路
文件页数/大小: 72 页 / 404 K
品牌: MICRONAS [ MICRONAS ]
 浏览型号SDA9380-B21的Datasheet PDF文件第36页浏览型号SDA9380-B21的Datasheet PDF文件第37页浏览型号SDA9380-B21的Datasheet PDF文件第38页浏览型号SDA9380-B21的Datasheet PDF文件第39页浏览型号SDA9380-B21的Datasheet PDF文件第41页浏览型号SDA9380-B21的Datasheet PDF文件第42页浏览型号SDA9380-B21的Datasheet PDF文件第43页浏览型号SDA9380-B21的Datasheet PDF文件第44页  
SDA 9380 - B21  
Preliminary Data Sheet  
System description  
A
1
2
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
HSYNC  
VSYNC  
1 line  
VD-  
start of even field  
start of odd field  
R
R
G
B
VBL  
22 lines  
odd field  
(default:  
BSE=0,  
VBS=0,  
VBE=0)  
R
G
B
B
even field  
2 lines  
G
B
VBL  
24 lines  
odd field  
(BSE=0,  
VBS=2,  
VBE=0)  
R
G
even field  
R
G
B
VBL  
20 lines  
odd field  
(BSE=1,  
RPP=1,  
VBS=0,  
VBE =1)  
R
G
B
even field  
Internal vertical blanking pulse VBL when JMP = 0 and number of lines per field = constant  
b) Description of VBL when JMP= 1  
Start of VBL = VBS lines before the first complete line of the next field  
(def. value 0)  
if BSE = 0  
end of VBL = end of line (VBE + 29) (odd field)  
width of VBL = (VBS + VBE + 29) lines (odd field)(def. value 29)  
if BSE = 1  
end of VBL = end of line (RPP + VBE + 25) (odd field)  
width of VBL = (VBS + RPP + VBE + 25) lines (odd field)  
Note! If JMP = 1 the number of lines between the last ref. pulse and the end of  
VBL is defined by VBE in the range of 7 (VBE = 0) to 14 (VBE = 7).  
Micronas  
5-32  
2001-01-29  
 复制成功!