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SDA9380-B21 参数 Datasheet PDF下载

SDA9380-B21图片预览
型号: SDA9380-B21
PDF下载: 下载PDF文件 查看货源
内容描述: EDDC增强偏转器和RGB处理器 [EDDC Enhanced Deflection Controller and RGB Processor]
分类和应用: 商用集成电路
文件页数/大小: 72 页 / 404 K
品牌: MICRONAS [ MICRONAS ]
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SDA 9380 - B21  
Preliminary Data Sheet  
System description  
- COR1..0:Contrast reduction of the channel 0 and 1 at FBL2  
00: 0 %  
01: 25 %  
10: 50 %  
11: 75 %  
- DELOFF:Delay from SVM output to RGB output  
0: delay on (see below)  
1: delay off (basic delay = 15ns)  
- SVMOFF:SVM output  
0: active (Y signal at SVM output)  
1: off (SVM output is high)  
- DEL1..0: Delay from SVM output to RGB output  
00: delay = 25ns  
.. ..  
11: delay = 55ns  
The Video input mode includes the following bits:  
RGBEN1  
MAT11  
MAT10  
0
RGBEN0  
MAT01  
MAT00  
YLL  
- RGBEN1:RGB/YUV 1 input  
0: YUV input  
1: RGB input  
- MAT11..0:RGB/YUV 1 input, YUV input standard  
00: PAL/SECAM  
01: NTSC/Jap.  
10: NTSC/US  
11: HDTV  
- RGBEN0:YUV/RGB 0 input  
0: YUV input  
1: RGB input  
- MAT01..0:YUV/RGB 0 input, YUV input standard  
00: PAL/SECAM  
01: NTSC/Jap.  
10: NTSC/US  
11: HDTV  
Micronas  
5-25  
2001-01-29  
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