PRELIMINARY DATA SHEET
MSP 34x1G
3.1.3. Protocol Description
Write to DSP or Demodulator
S
write
device
address
Wait ACK sub-addr ACK addr-byte ACK addr-byte ACK data-byte- ACK data-byte ACK
high low high low
P
Read from DSP or Demodulator
S
write
device
address
Wait ACK sub-addr ACK addr-byte ACK addr-byte ACK
high low
S
read
device
address
Wait ACK data-byte- ACK data-byte NAK
high low
P
Write to Control or Test Registers
S
write
device
address
Wait ACK sub-addr ACK data-byte ACK data-byte ACK P
high
low
Note: S =
P =
I2C-Bus Start Condition from master
I2C-Bus Stop Condition from master
ACK = Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray)
or master (= controller dark gray)
NAK = Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate ‘End of Read’
or from MSP indicating internal error state
Wait = I2C-Clock line is held low, while the MSP is processing the I2C command. This waiting time is
max. 1 ms
1
0
I2C_DA
S
P
I2C_CL
Fig. 3–1: I2C bus protocol (MSB first; data must be stable while clock is high)
MICRONAS INTERMETALL
19
MICRONAS [ MICRONAS ]
