MSP 34x1G
PRELIMINARY DATA SHEET
Table 3–1: I2C Bus Device Addresses
ADR_SEL
Low
High
Read
Left Open
Mode
Write
Read
Write
Write
Read
MSP device address
80 hex
81 hex
84 hex
85 hex
88 hex
89 hex
Table 3–2: I2C Bus Subaddresses
Name
Binary Value
Hex Value
Mode
Function
CONTROL
0000 0000
00
Read/Write
Write: Software reset of MSP (see Table 3–3)
Read: Hardware error status of MSP
TEST
0000 0001
0001 0000
0001 0001
0001 0010
0001 0011
01
10
11
12
13
Write
Write
Write
Write
Write
only for internal use
WR_DEM
RD_DEM
WR_DSP
RD_DSP
write address demodulator
read address demodulator
write address DSP
read address DSP
3.1.2. Description of CONTROL Register
Table 3–3: CONTROL as a Write Register
Name
Subaddress
Bit[15] (MSB)
Bits[14:0]
CONTROL 00 hex
1 : RESET
0 : normal
0
Table 3–4: CONTROL as a Read Register (only MSP 34x1G-versions from A2 on)
Name Subaddress Bit[15] (MSB) Bit[14]
CONTROL 00 hex Reset status after last reading of CONTROL: Internal hardware status:
Bits[13:0]
not of interest
0 : no reset occured
1 : reset occured
0 : no error occured
1 : internal error occured
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on, bit[15] of CONTROL will be set; it must be
read once to be resetted.
18
MICRONAS INTERMETALL