MAS 35x9F
DATA SHEET
Table 3–3: Direct configuration registers, continued
2
I C Sub-
address
(hex)
Function
Name
77
DCFR Register (reset = 00
)
DCFR
hex
Battery Voltage Monitor
bit[15]
Comparison result (readback)
1
0
input voltage at pin VBAT above defined threshold
input voltage at pin VBAT below defined threshold
bit[14]
Number of battery cells
0
1
1 cell (range 0.8...1.5 V) (reset)
2 cells (range 1.6...3.0 V)
bit[13:10]
Voltage threshold level
1 cell
2 cells
3.0 V
2.9 V
1111
1110
...
1.5
1.45
0010
0001
0000
0.85
0.8
1.7 V
1.6 V
battery voltage supervision off (reset)
bit[9:8]
Reserved, must be set to 0
The result is stable 1 ms after enabling. The setup time for switching between
two thresholds is negligibly small.
For power management reasons, the battery voltage monitor should be
switched off by setting bit[13:10] to zero when the measurement is completed.
DC/DC Converter Frequency Control (PWM)
bit[7:4]
bit[3:0]
Reserved, must be set to 0
Frequency of DC/DC converter
Reference: 24.576
22.5792
18.432 MHz
297.3 kHz
307.2 kHz
317.8 kHz
329.1 kHz
341.3 kHz
354.5 kHz
368.6 kHz
384.0 kHz (reset)
400.7 kHz
418.9 kHz
438.9 kHz
460.8 kHz
485.1 kHz
512.0 kHz
542.1 kHz
576.0 kHz
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
1101
1100
1011
1010
1001
1000
315.1
323.4
332.1
341.3
351.1
361.4
372.4
384.0
396.4
409.6
423.7
438.9
455.1
472.6
491.5
512.0
289.5
297.1
305.1
313.6
322.6
332.0
342.1
352.8
364.2
376.3
389.3
403.2
418.1
434.2
451.6
470.4
2
If the audio codec is not enabled (bit[11] of the CONTROL register at I C-sub-
address 6A is zero), the clock for the DC/DC converters is directly derived
hex
from the crystal frequency (nominal 18.432 MHz). Otherwise, the synthesizer
clock is used as the reference (please refer to the respective column in
Table 2–1 on page 11).
26
June 30, 2004; 6251-505-1DS
Micronas
MICRONAS [ MICRONAS ]
