PRELIMINARY DATA SHEET
MAS 3507D
Note: S =
P =
I2C-Bus Start Condition from master
I2C-Bus Stop Condition from master
ACK = Acknowledge-Bit: LOW on I2C_DA from slave or master
NAK = Not Acknowledge-Bit: HIGH on I2C_DA from master to indicate ‘End of Read’
Wait = I2C-Clock line is held low, while the MAS 3507D is processing the I2C command.
1
0
I2C_DA
S
P
I2C_CL
Fig. 3–1: I2C bus protocol (MSB first; data must be stable while clock is high)
3.2. Command Structure
3.2.1. The Internal Fixed Point Number Format
The I2C control of the MAS 3507D is done completely
via the I2C data register by using a special command
syntax. The commands are executed by the
MAS 3507D during its normal operation without any
loss or interruption of the incoming data or outgoing
audio data stream. These I2C commands allow the
controller to access internal states, RAM contents,
internal hardware control registers, and even a down-
load of an alternative software module. The command
structure allows sophisticated control of the
MAS 3507D. The registers of the MAS 3507D are
either general purpose, e.g. for program flow control,
or specialized registers that directly affect hardware
blocks. The unrestricted access to these registers
allows the system controller to overrule the firmware
configuration of the serial interfaces or the default input
line selection.
Internal register or memory values can easily be
accessed via the I2C interface. In this document, two
number representations are used: the fixed point nota-
tion ‘v’ and the 2’s complement number notation ‘r’.
The conversion between the two forms of notation is
easily done (see the following equations).
r = v x 524288.0 + 0.5; (−1.0 ≤ v < 1.0)
v = r / 524288.0; (−524288 < r < 524287)
(EQ 1)
(EQ 2)
The control interface is also used for low bit rate data
transmission, e.g. MPEG-embedded ancillary data
transmission. The data information is performed by
sending a ‘read memory’ command to the MAS 3507D
and by reading the memory block that temporarily con-
tains the required information. The synchronization
between the controller and the MAS 3507D is done via
a MPEG-FRAME-SYNC signal or by monitoring the
MPEGFrameCount register (at the cost of a higher
work load for the controller).
The MAS 3507D firmware scans the I2C interface peri-
odically and checks for pending or new commands.
However, due to some time critical firmware parts, a
certain latency time for the response has to be
expected. The theoretical worst case response time
does not exceed 4 ms. Table 3–4 shows the basic con-
troller commands that are available by the
MAS 3507D.
Micronas
19
MICRONAS [ MICRONAS ]
