CIP 3250A
weighting factors (ct) and (sat), the user can select be-
tween rounding and two different modes of noise shap-
ing (1 bit error diffusion or 2 bit error diffusion).
ADVANCE INFORMATION
Rounding
Y
6
1 bit
Err. Diff.
2 bit
Err. Diff.
8
255
0
Y
8
<17>PXSKWON. In this mode, the DL2 block serves as
a variable delay to match the analog RGB/YUV data with
digital YUV data. The first pixel of analog RGB/YUV writ-
ten into the DL2 block (which works like a FIFO) is se-
lected by <21>DL2. Read of the DL2 block starts syn-
chronously with the AVI input, which in turn marks the
first pixel in digital YUV data (see Fig. 2–14). Care must
be taken that the number of pixels stored in DL2 block
must be within the limits of 48 to 210.
In case of SECAM processing in the DIGIT 2000 envi-
ronment, the digital luma and chroma signals do not
match in front of the CIP 3250A. Therefore, the I
2
C regis-
ter <10>SECAM must be enabled, and fine adjustment
has to be carried out within the ACVP.
2.6. Skew Filter
Two interpolation filters perform data orthogonalization
(= skew correction) for luma and chroma in case of a
non-line-locked system clock. The skew value is serially
input via the FSY input. In a system environment where
digital YUV data are orthogonal (e.g. DIGIT 3000), the
skew correction must be set to DIGIT 3000 mode via I
2
C
register <04>SKWCBS in order to apply skew correction
to analog RGB/YUV data only. Additionally, the skew
correction must be switched on via I
2
C register
<04>SKWON. This has to be done in order to mix the
analog input with the digital YUV input correctly and to
output the mixed YUV signal in an orthogonal format.
For standard DIGIT 2000 operation, the skew correction
should be switched off via I
2
C register <04>SKWON, in
order to output the mixed YUV data with the same skew
values as the digital YUV input. Only in special applica-
tions (e.g. multi media), where the output connects to a
field or frame memory which processes orthogonal data,
the skew correction for mixed YUV data has to be
switched on and set to DIGIT 2000 mode via I
2
C register
<04>SKWCBS.
2.7. Fast Blank Processing
– mixing of RGB-path and YUV-path in YUV 4:4:4 format
controlled by the Fast Blank signal
– linear or nonlinear mixing technique selectable
– programmable polarity of Fast Blank signal
– programmable step response of Fast Blank signal
– RGB-path or YUV-path can be statically selected
– Fast Blank signal monitoring
2.7.1. Soft Mixer
In the Fast Blank signal path, special hardware is sup-
plied to improve edge effects, such as blurring because
of band limiting in the analog front end. Different step re-
sponses are user selectable via I
2
C register <12>MIX-
AMP, still obtaining high quality phase resolution. Also,
Micronas
2
ct
Select
br
I
2
C Registers
Fig. 2–2:
Luma Contrast & Brightness Adjustment
Rounding
R–Y
B–Y
6
1 bit
Err. Diff.
2 bit
Err. Diff.
127
–128
V
U
8
2
sat
Select
I
2
C Registers
Fig. 2–3:
Chroma Saturation Adjustment
2.5. Delay Adjustment
– DL1 to compensate internal processing delay of the
CIP 3250A in reference to digital YUVin
– DL1 to compensate processing delay of the DIGIT
2000 SPU chroma channel in SECAM mode
– DL2 to compensate delay between digital YUVin and
analog RGBin or FSY; as for example, produced by
ACVP or SPU.
To mix the analog RGB/YUV input signals and the digital
YUVin input signals at the soft mixer correctly, in refer-
ence to the horizontal synchronization pulse, two pro-
cessing delay adjustments can be made. In many sys-
tem applications, ICs in front of the CIP 3250A cause a
fixed processing delay in the digital YUVin path. There-
fore, a delay of up to 210 sample clocks can be pro-
grammed via I
2
C register <21>DL2 to match analog
RGB/YUV data with digital YUV data . If the delay is less
than 48 sample clocks, the DL1 block can be activated
(80 sample clocks) via I
2
C register <10>DL1ON to get
a value for <21>DL2 within the range of 48 to 210.
In applications where there will be no fixed delay be-
tween digital YUVin and analog RGB/YUV, the pixel
skew correction can be switched on via I
2
C register
8
MICRONAS [ MICRONAS ]
