128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Features
List of Tables
Table 1: Main Array Memory Map – 128Mb, 256Mb ........................................................................................... 9
Table 2: Main Array Memory Map – 512Mb, 1Gb ............................................................................................. 10
Table 3: Device ID Codes ............................................................................................................................... 12
Table 4: Signal Descriptions ........................................................................................................................... 15
Table 5: Address Mapping for Address/Data Mux Mode .................................................................................. 16
Table 6: Bus Control Signals ........................................................................................................................... 17
Table 7: Command Set .................................................................................................................................. 22
Table 8: Status Register Bit Definitions (Default Value = 0080h) ....................................................................... 24
Table 9: CLEAR STATUS REGISTER Command Bus Cycles ............................................................................... 25
Table 10: Read Configuration Register Bit Definitions ..................................................................................... 26
Table 11: Supported Clock Frequencies .......................................................................................................... 26
Table 12: PROGRAM READ CONFIGURATION REGISTER Bus Cycles .............................................................. 27
Table 13: Extended Configuration Register Bit Definitions (Default Value = 0004h) ........................................... 28
Table 14: Output Driver Control Characteristics .............................................................................................. 28
Table 15: Program Extended Configuration Register Command Bus Cycles ...................................................... 29
Table 16: READ MODE Command Bus Cycles ................................................................................................. 30
Table 17: Device Information ......................................................................................................................... 31
Table 18: WAIT Behavior Summary – Non-MUX ............................................................................................. 32
Table 19: WAIT Behavior Summary – AD MUX ................................................................................................ 32
Table 20: Programming Region Next State ...................................................................................................... 37
Table 21: PROGRAM Command Bus Cycles .................................................................................................... 38
Table 22: BEFP Requirements and Considerations .......................................................................................... 40
Table 23: ERASE Command Bus Cycle ............................................................................................................ 42
Table 24: Valid Commands During Suspend ................................................................................................... 43
Table 25: SUSPEND and RESUME Command Bus Cycles ................................................................................ 44
Table 26: BLANK CHECK Command Bus Cycles ............................................................................................. 45
Table 27: BLOCK LOCK Command Bus Cycles ................................................................................................ 46
Table 28: Block Lock Configuration ................................................................................................................ 47
Table 29: Program OTP Area Command Bus Cycles ......................................................................................... 48
Table 30: Dual Operation Restrictions ............................................................................................................ 52
Table 31: Power Sequencing ........................................................................................................................... 53
Table 32: Reset Specifications ........................................................................................................................ 54
Table 33: Absolute Maximum Ratings ............................................................................................................. 56
Table 34: Operating Conditions ...................................................................................................................... 56
Table 35: DC Current Characteristics and Operating Conditions ...................................................................... 57
Table 36: DC Voltage Characteristics and Operating Conditions ...................................................................... 60
Table 37: AC Input Requirements ................................................................................................................... 61
Table 38: Test Configuration Load Capacitor Values for Worst Case Speed Conditions ...................................... 61
Table 39: Capacitance .................................................................................................................................... 62
Table 40: AC Read Specifications (CLK-Latching, 133 MHz), VCCQ = 1.7V to 2.0V ............................................... 63
Table 41: AC Write Specifications ................................................................................................................... 73
Table 42: Program/Erase Characteristics ........................................................................................................ 80
Table 43: Example of CFI Output (x16 Device) as a Function of Device and Mode ............................................. 81
Table 44: CFI Database: Addresses and Sections ............................................................................................. 81
Table 45: CFI ID String ................................................................................................................................... 82
Table 46: System Interface Information .......................................................................................................... 82
Table 47: Device Geometry ............................................................................................................................ 83
Table 48: Block Region Map Information ........................................................................................................ 84
Table 49: Primary Micron-Specific Extended Query ........................................................................................ 86
Table 50: One Time Programmable (OTP) Space Information .......................................................................... 87
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
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