P30-65nm
Table 32: CFI Identification
Hex
Offset
Length
3
Description
Add.
Value
Code
10:
11:
12:
--51
--52
--59
“Q”
“R”
“Y”
10h
Query-unique ASCII string “QRY”.
Primary Vendor command set and control interface ID code.
16-bit ID code for Vendor-specified algorithms.
13:
14:
--01
--00
13h
15h
17h
19h
2
2
2
2
15:
16:
--0A
--01
Extended Query Table primary algorithm address.
Alternate vendor command set and control interface ID code.
0000h means no second vendor-specified algorithm exists.
17:
18:
--00
--00
Secondary algorithm Extended Query Table address.
0000h means none exists.
19:
1A:
--00
--00
Table 33: System Interface Information
Hex
Code
Offset Length
Description
Add
Value
VCC logic supply minimum program/erase voltage
bits 0-3 BCD 100 mV
1Bh
1Ch
1
1
1B:
--17
1.7V
bits 4-7 BCD volts
VCC logic supply maximum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 BCD volts
1C:
1D:
1E:
--20
--85
--95
2.0V
8.5V
9.5V
VPP [programming] supply minimum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 HEX volts
1Dh
1Eh
1
1
VPP [programming] supply maximum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 HEX volts
n
1Fh
20h
21h
22h
1
1
1
1
“n” such that typical single word program time-out = 2 µ-sec
1F:
20:
21:
22:
--09
--0A
--0A
--00
512µs
1024µs
1s
n
“n” such that typical full buffer write time-out = 2 µ-sec
n
“n” such that typical block erase time-out = 2 m-sec
n
“n” such that typical full chip erase time-out = 2 m-sec
NA
n
“n” such that maximum word program time-out = 2 times
23h
24h
1
1
23:
24:
--01
--02
1024µs
4096µs
typical
n
“n” such that maximum buffer write time-out = 2 times
typical
n
“n” such that maximum block erase time-out = 2 times
typical
25h
26h
1
1
25:
26:
--02
--00
4s
n
“n” such that maximum chip erase time-out = 2 times typical
NA
Datasheet
63
Sept 2012
OrderNumber:208042-06
MICRON [ MICRON TECHNOLOGY ]
