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PC28F00BP30EFA 参数 Datasheet PDF下载

PC28F00BP30EFA图片预览
型号: PC28F00BP30EFA
PDF下载: 下载PDF文件 查看货源
内容描述: Numonyx® Axcellâ ?? ¢ P30-65nm闪存 [Numonyx® Axcell™ P30-65nm Flash Memory]
分类和应用: 闪存内存集成电路
文件页数/大小: 86 页 / 11765 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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P30-65nm  
Figure 13: OTP Register Map  
0x109  
128-bit OTP Register 16  
(User-Programmable)  
0x102  
0x91  
128-bit OTP Register 1  
(User-Programmable)  
0x8A  
0x89  
Lock Register 1  
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
0
0x88  
64-bit Segment  
(User-Programmable)  
0x85  
0x84  
128-Bit OTP Register 0  
64-bit Segment  
(Factory-Programmed)  
0x81  
0x80  
Lock Register 0  
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
0
11.3.1  
11.3.2  
Reading the OTP Registers  
The OTP Registers can be read from OTP-RA address. To read the OTP Register, first  
issue the Read Device Identifier command at OTP-RA address to place the device in the  
Read Device Identifier state (see Section 6.2, “Device Command Bus Cycles” on  
page 20). Next, perform a read operation using the address offset corresponding to the  
register to be read. Table 8, “Device Identifier Information” on page 22 shows the  
address offsets of the OTP Registers and Lock Registers. OTP Registers and Lock  
Registers data is read 16 bits at a time.  
Programming the OTP Registers  
To program an OTP Register, first issue the OTP Register Program Setup command at  
the device base address plus the offset address of the desired OTP Register location  
(OTP-RA: see Figure 13, “OTP Register Map” on page 42). Next, write the desired OTP  
Register data to the same OTP Register address. See Section 6.2, “Device Command  
Bus Cycles” on page 20.  
Datasheet  
42  
Sept 2012  
Order Number: 208042-06  
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