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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Instructions  
N25Q128 - 1.8 V  
Figure 16. Quad Input/ Output Fast Read instruction sequence  
S
Mode 3  
0
1
2
3
4
5
6
7
8
9
10 11 12  
14 15 16  
21 22 23 24 25 26  
27  
13  
0
C
Mode 0  
IO switches from Input to Output  
Instruction  
4
0
4
0
4
0
4
0
DQ0  
DQ1  
DQ2  
4
4
Don’t Care  
Don’t Care  
5
6
1
2
5
6
1
2
5
1
2
5
6
1
2
5
6
1
2
5
6
6
DQ3  
7
3
7
3
7
3
7
3
7
3
7
‘1’  
A7-0  
Dummy (ex.: 10)  
Byte 2  
Byte 1  
A15-8  
A23-16  
Quad_IO_Fast_Read  
9.1.8  
Read OTP (ROTP)  
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read  
OTP (ROTP) instruction is followed by a 3-byte address (A23- A0) and a dummy byte. Each  
bit is latched in on the rising edge of Serial Clock (C).  
Then the memory contents at that address are shifted out on Serial Data output (DQ1).  
Each bit is shifted out at the maximum frequency, fCmax, on the falling edge of Serial Clock  
(C). The instruction sequence is shown in Figure 17.  
The address is automatically incremented to the next higher address after each byte of data  
is shifted out.  
There is no rollover mechanism with the Read OTP (ROTP) instruction. This means that the  
Read OTP (ROTP) instruction must be sent with a maximum of 65 bytes to read. All other  
bytes outside the OTP area are “Don’t Care.”  
The Read OTP (ROTP) instruction is terminated by driving Chip Select (S) High. Chip  
Select (S) can be driven High at any time during data output. Any Read OTP (ROTP)  
instruction issued while an Erase, Program or Write cycle is in progress, is rejected without  
having any effect on the cycle that is in progress.  
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