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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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N25Q128 - 1.8 V  
Instructions  
Table 15. Instruction set: extended SPI protocol (page 2 of 2)  
One-byte  
Instruction Instruction Address  
Code (BIN) Code (HEX) bytes  
One-byte  
Dummy  
clock  
cycle  
Data  
bytes  
Instruction  
Description  
Read Volatile Enhanced  
Configuration Register  
RDVECR  
WRVECR  
0110 0101  
0110 0001  
65h  
61h  
0
0
0
1 to ∞  
Write Volatile Enhanced  
Configuration Register  
0
1
DP  
Deep Power-down  
1011 1001  
1010 1011  
B9h  
ABh  
0
0
0
0
0
RDP  
Release from Deep Power-down  
0
1) The Number of dummy clock cycles is configurable by user  
2) Subsector erase instruction is only available in Bottom or Top parts  
9.1.1  
Read Identification (RDID)  
The Read Identification (RDID) instruction allows to read the device identification data:  
Manufacturer identification (1 byte)  
Device identification (2 bytes)  
A Unique ID code (UID) (17 bytes, of which 14 factory programmed upon  
customer request).  
The manufacturer identification is assigned by JEDEC, and has the value 20h. The device  
identification is assigned by the device manufacturer, and indicates the memory type in the  
first byte (BBh), and the memory capacity of the device in the second byte (18h). The UID is  
composed by 17 read only bytes, containing the length of the following data in the first byte  
(set to 10h), 2 bytes of Extended Device ID (EDID) to identify the specific device  
configuration (Top, Bottom or uniform architecture, Hold or Reset functionality), and 14  
bytes of the optional Customized Factory Data (CFD) content. The CFD bytes can be  
factory programmed with customers data upon their demand. If the customers do not make  
requests, the devices are shipped with all the CFD bytes programmed to zero (00h).  
Any Read Identification (RDID) instruction while an Erase or Program cycle is in progress, is  
not decoded, and has no effect on the cycle that is in progress.  
The device is first selected by driving Chip Select (S) Low. Then, the 8-bit instruction code  
for the instruction is shifted in. After this, the 24-bit device identification, stored in the  
memory, the 17 bytes of UID content will be shifted out on Serial Data output (DQ1). Each  
bit is shifted out during the falling edge of Serial Clock (C).  
The instruction sequence is shown in Figure 10.  
The Read Identification (RDID) instruction is terminated by driving Chip Select (S) High at  
any time during data output.  
When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in  
the Standby Power mode, the device waits to be selected, so that it can receive, decode and  
execute instructions.  
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