欢迎访问ic37.com |
会员登录 免费注册
发布采购

N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号N25Q128A11B1241F的Datasheet PDF文件第19页浏览型号N25Q128A11B1241F的Datasheet PDF文件第20页浏览型号N25Q128A11B1241F的Datasheet PDF文件第21页浏览型号N25Q128A11B1241F的Datasheet PDF文件第22页浏览型号N25Q128A11B1241F的Datasheet PDF文件第24页浏览型号N25Q128A11B1241F的Datasheet PDF文件第25页浏览型号N25Q128A11B1241F的Datasheet PDF文件第26页浏览型号N25Q128A11B1241F的Datasheet PDF文件第27页  
N25Q128 - 1.8 V  
Operating features  
5
Operating features  
5.1  
Extended SPI Protocol Operating features  
5.1.1  
Read Operations  
To read the memory content in Extended SPI protocol different instructions are available:  
READ, Fast Read, Dual Output Fast Read, Dual Input Output Fast Read, Quad Output Fast  
Read and Quad Input Output Fast read, allowing the application to choose an instruction to  
send addresses and receive data by one, two or four data lines.  
Note:  
In the Extended SPI protocol the instruction code is always sent on one data line (DQ0): to  
use two or four data lines the user must use either the DIO-SPI or the QIO-SPI protocol  
respectively.  
For fast read instructions the number of dummy clock cycles is configurable by using VCR  
bits [7:4] or NVCR bits [15:12].  
After a successful reading instruction a reduced tSHSL equal to 20 ns is allowed to further  
improve random access time (in all the other cases tSHSL should be at least 50 ns). See  
Table 33.: AC Characteristics.  
5.1.2  
Page programming  
To program one data byte, two instructions are required: write enable (WREN), which is one  
byte, and a page program (PP) sequence, which consists of four bytes plus data. This is  
followed by the internal program cycle (of duration t ).  
PP  
To spread this overhead, the page program (PP) instruction allows up to 256 bytes to be  
programmed at a time (changing bits from ‘1’ to ‘0’), provided that they lie in consecutive  
addresses on the same page of memory.  
For optimized timings, it is recommended to use the page program (PP) instruction to  
program all consecutive targeted bytes in a single sequence versus using several page  
program (PP) sequences with each containing only a few bytes (see Section 5.2.3: Page  
programming and Table 33: AC Characteristics).  
5.1.3  
5.1.4  
Dual input fast program  
The dual input fast program (DIFP) instruction makes it possible to program up to 256 bytes  
using two input pins at the same time (by changing bits from ‘1’ to ‘0’).  
For optimized timings, it is recommended to use the DIFP instruction to program all  
consecutive targeted bytes in a single sequence rather using several DIFP sequences each  
containing only a few bytes (see Section 9.1.12: Dual Input Fast Program (DIFP)).  
Dual Input Extended Fast Program  
The Dual Input Extended Fast Program (DIEFP) instruction is an enhanced version of the  
Dual Input Fast Program instruction, allowing to transmit address across two data lines.  
For optimized timings, it is recommended to use the DIEFP instruction to program all  
consecutive targeted bytes in a single sequence rather than using several DIEFP  
sequences, each containing only a few bytes.  
23/185  
 复制成功!