欢迎访问ic37.com |
会员登录 免费注册
发布采购

N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号N25Q128A11B1241F的Datasheet PDF文件第129页浏览型号N25Q128A11B1241F的Datasheet PDF文件第130页浏览型号N25Q128A11B1241F的Datasheet PDF文件第131页浏览型号N25Q128A11B1241F的Datasheet PDF文件第132页浏览型号N25Q128A11B1241F的Datasheet PDF文件第134页浏览型号N25Q128A11B1241F的Datasheet PDF文件第135页浏览型号N25Q128A11B1241F的Datasheet PDF文件第136页浏览型号N25Q128A11B1241F的Datasheet PDF文件第137页  
N25Q128 - 1.8 V  
Instructions  
All attempts to access the memory array during a Write Status Register cycle, a Write Non  
Volatile Configuration Register, a Program cycle or an Erase cycle are ignored, and the  
internal Write Status Register cycle, Write Non Volatile Configuration Register, Program  
cycle or Erase cycle continues unaffected, the only exception is the Program/Erase  
Suspend instruction (PES), that can be used to pause all the program and the erase cycles  
but the Program OTP (POT), Bulk Erase (BE) and Write Non Volatile Configuration Register.  
The suspended program or erase cycle can be resumed by mean of the Program/Erase  
Resume instruction (PER). During the program/erase cycles also the polling instructions (to  
check if the internal modify cycle is finished by mean of the WIP bit of the Status Register or  
of the Program/Erase controller bit of the Flag Status register) are also accepted to allow the  
application checking the end of the internal modify cycles, of course these polling  
instructions don't affect the internal cycles performing.  
Table 24. Instruction set: QIO-SPI protocol (page 1 of 2)  
One-byte  
One-byte  
Instruction  
Code (BIN)  
Dummy  
clock  
cycle  
Instruction Address  
Data  
bytes  
Instruction  
Description  
Code  
(HEX)  
bytes  
MIORDID  
QCFR  
Multiple I/O read identification  
Quad Command Fast Read  
1010 1111  
0000 1011  
0110 1011  
1110 1011  
0100 1011  
0000 0110  
0000 0100  
0000 0010  
0011 0010  
0001 0010  
AFh  
0
3
3
3
3
0
0
3
3
3
0
1 to 3  
0Bh  
6Bh  
EBh  
4Bh  
06h  
04h  
02h  
32h  
12h  
10 (1)  
1 to ∞  
1 to ∞  
1 to ∞  
1 to 65  
0
10 (1)  
10 (1)  
ROTP  
WREN  
WRDI  
Read OTP (Read of OTP area)  
Write Enable  
10 (1)  
0
0
0
0
0
Write Disable  
0
1 to 256  
1 to 256  
1 to 256  
QCPP  
Quad Command Page Program  
Program OTP (Program of OTP  
area)  
POTP  
0100 0010  
42h  
3
0
1 to 65  
SSE(2)  
SE  
SubSector Erase  
0010 0000  
1101 1000  
1100 0111  
0111 1010  
0111 0101  
0000 0101  
0000 0001  
1110 1000  
1110 0101  
0111 0000  
0101 0000  
1011 0101  
20h  
D8h  
C7h  
7Ah  
75h  
05h  
01h  
E8h  
E5h  
70h  
50h  
B5h  
3
3
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Sector Erase  
0
BE  
Bulk Erase  
0
PER  
Program/Erase Resume  
Program/Erase Suspend  
Read Status Register  
Write Status Register  
Read Lock Register  
Write to Lock Register  
Read Flag Status Register  
Clear Flag Status Register  
Read NV Configuration Register  
0
PES  
0
RDSR  
WRSR  
RDLR  
WRLR  
RFSR  
CLFSR  
RDNVCR  
1 to ∞  
1
1 to ∞  
1
1 to ∞  
0
2
133/185