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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Instructions  
N25Q128 - 1.8 V  
9.2.23  
Read Volatile Enhanced Configuration Register  
The Read Volatile Enhanced Configuration Register (RDVECR) instruction allows the  
Volatile Configuration Register to be read.  
Figure 68. Read Volatile Enhanced Configuration Register instruction sequence  
DIO-SPI  
S
0
1
2
3
4
5
6
7
8
9 10 11  
C
Volatile Enhanced  
Configuration Register Out  
Byte  
Byte  
Instruction  
6
4
2
0
1
6
7
4
5
2
0
DQ0  
DQ1  
7
5
3
3
1
Dual_Read_VECR  
9.2.24  
Write Volatile Enhanced Configuration Register  
The Write Volatile Enhanced Configuration register (WRVECR) instruction allows new  
values to be written to the Volatile Enhanced Configuration register. Before it can be  
accepted, a write enable (WREN) instruction must previously have been executed. In case  
of Fast POR, the WREN instruction is not required because a WREN instruction gets the  
device out from the Fast POR state (See Section 11.1: Fast POR).  
Apart form the parallelizing of the instruction code and the input data on the two pins DQ0  
and DQ1, the instruction functionality is exactly the same as the Write Volatile Enhanced  
Configuration Register (WRVECR) instruction of the Extended SPI protocol, please refer to  
Section 9.1.33: Write Volatile Enhanced Configuration Register for further details.  
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