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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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N25Q128 - 1.8 V  
Instructions  
9.2.15  
Read Lock Register (RDLR)  
The Read Lock Register instructions is used to read the lock register content.  
Apart form the parallelizing of the instruction code, the address and the output data on the  
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Read Lock  
Register (RDLR) instruction of the Extended SPI protocol, please refer to Section 9.1.24:  
Read Lock Register (RDLR) for further details.  
Figure 60. Read Lock Register instruction and data-out sequence DIO-SPI  
S
C
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 12 13 14 15  
Instruction  
24-Bit Address  
14 12 10 8  
Lock Register Out  
6
7
4
5
2
3
0
1
6
4
0
22 20 18 16  
23 21 19 17  
2
DQ0  
DQ1  
7
5
1
3
15 13 11 9  
Dual_Read_LR  
9.2.16  
Write to Lock Register (WRLR)  
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock  
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously  
have been executed.  
Apart form the parallelizing of the instruction code, the address and the input data on the  
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Write to Lock  
Register (WRLR) instruction of the Extended SPI protocol, please refer to Section 9.1.25:  
Write to Lock Register (WRLR) for further details.  
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