ADVANCE
128Mb: x16, x32
MOBILE SDRAM
SINGLE READ – WITHOUT AUTO PRECHARGE1
T0
T1
T2
T3
T4
T5
T6
T7
T8
t
CK
t
CL
CLK
t
CH
t
t
CKS
CKH
CKE
t
t
CMS CMH
3
3
COMMAND
PRECHARGE
ACTIVE
NOP
READ
NOP
NOP
NOP
ACTIVE
ROW
NOP
t
t
CMS CMH
DQMU, DQML
A0-A9, A11
t
t
AH
AS
COLUMN m2
ROW
t
AS
t
AH
ALL BANKS
ROW
ROW
A10
DISABLE AUTO PRECHARGE
BANK
SINGLE BANKS
BANK(S)
t
AS
t
AH
BA0, BA1
BANK
BANK
t
AC
t
OH
D
OUT m
DQ
t
LZ
t
HZ
t
t
RCD
CAS Latency
RP
t
RAS
t
RC
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-8
-10
MAX UNITS
-8
-10
SYMBOL*
MIN
MAX
MIN
SYMBOL*
MIN
1
MAX
MIN
1
MAX UNITS
t
t
t
t
t
t
t
t
t
t
t
t
AC (3)
7
8
7
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CMH
CMS
ns
ns
t
AC (2)
2.5
2.5
t
AC (1)
19
22
HZ (3)
HZ (2)
HZ (1)
LZ
7
8
7
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AH
1
2.5
3
1
2.5
3
t
AS
19
22
t
CH
1
1
t
CL
3
3
OH
2.5
48
80
20
20
2.5
50
t
CK (3)
8
10
12
25
1
RAS
RC
120,000
120,000
t
CK (2)
10
20
1
100
20
t
CK (1)
RCD
RP
t
CKH
20
t
CKS
2.5
2.5
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 1, the CAS latency = 2, and the READ burst is followed by a “manual”
PRECHARGE.
2. x16: A9 and A11 = “Don’t Care”
x32: A8, A9,and A11 = “Don’t Care”
3. PRECHARGE command not allowed or tRAS would be violated.
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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