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MT48LC4M16A2P-75G 参数 Datasheet PDF下载

MT48LC4M16A2P-75G图片预览
型号: MT48LC4M16A2P-75G
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM MT48LC16M4A2 â ????梅格4 ×4× 4银行MT48LC8M8A2 â ???? 2梅格×8× 4银行MT48LC4M16A2 â ???? 1梅格×16× 4银行 [SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 83 页 / 3595 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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64Mb: x4, x8, x16 SDRAM  
WRITE Operation  
Figure 35: WRITE – DQM Operation  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
t
t
CL  
CK  
CLK  
CKE  
t
CH  
t
t
CKS  
CKH  
t
t
CMS  
CMH  
Command  
DQM  
ACTIVE  
NOP  
WRITE  
t
NOP  
NOP  
NOP  
NOP  
NOP  
t
CMS CMH  
t
t
t
t
AH  
AS  
Address  
Row  
t
Column m  
AS  
AH  
Enable auto precharge  
Row  
t
A10  
Disable auto precharge  
Bank  
AS  
AH  
BA0, BA1  
Bank  
t
t
t
t
t
t
DS  
DH  
DIN  
DS  
DH  
DS  
DH  
DIN  
DIN  
DQ  
t
Don’t Care  
RCD  
1. For this example, BL = 4.  
Note:  
Burst Read/Single Write  
The burst read/single write mode is entered by programming the write burst mode bit  
(M9) in the mode register to a 1. In this mode, all WRITE commands result in the access  
of a single column location (burst of one), regardless of the programmed burst length.  
READ commands access columns according to the programmed burst length and se-  
quence, just as in the normal mode of operation (M9 = 0).  
PDF: 09005aef80725c0b  
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
63  
© 1999 Micron Technology, Inc. All rights reserved.