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MT47H128M8HV-187EAT 参数 Datasheet PDF下载

MT47H128M8HV-187EAT图片预览
型号: MT47H128M8HV-187EAT
PDF下载: 下载PDF文件 查看货源
内容描述: DDR2 SDRAM [DDR2 SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 131 页 / 9265 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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1Gb: x4, x8, x16 DDR2 SDRAM  
Commands  
6. Bank addresses (BA) determine which bank is to be operated upon. BA during a LOAD  
MODE command selects which mode register is programmed.  
7. SELF REFRESH exit is asynchronous.  
8. Burst reads or writes at BL = 4 cannot be terminated or interrupted. See Figure 48  
(page 94) and Figure 60 (page 105) for other restrictions and details.  
9. The power-down mode does not perform any REFRESH operations. The duration of power-  
down is limited by the refresh requirements outlined in the AC parametric section.  
Table 37: Truth Table – Current State Bank n – Command to Bank n  
Notes: 1–6 apply to the entire table  
Current  
State  
CS#  
H
L
RAS#  
CAS#  
WE#  
X
H
H
H
L
Command/Action  
DESELECT (NOP/continue previous operation)  
NO OPERATION (NOP/continue previous operation)  
ACTIVATE (select and activate row)  
REFRESH  
Notes  
Any  
X
H
L
X
H
H
L
Idle  
L
L
L
7
L
L
L
LOAD MODE  
7
Row active  
L
H
H
L
L
H
L
READ (select column and start READ burst)  
WRITE (select column and start WRITE burst)  
PRECHARGE (deactivate row in bank or banks)  
READ (select column and start new READ burst)  
WRITE (select column and start WRITE burst)  
PRECHARGE (start PRECHARGE)  
8
L
L
8
L
H
L
L
9
Read (auto  
precharge  
disabled)  
L
H
H
L
H
L
8
L
L
8, 10  
L
H
L
L
9
8
8
9
Write  
L
H
H
L
H
L
READ (select column and start READ burst)  
WRITE (select column and start new WRITE burst)  
PRECHARGE (start PRECHARGE)  
(auto pre-  
charge disa-  
bled)  
L
L
L
H
L
1. This table applies when CKEn - 1 was HIGH and CKEn is HIGH and after tXSNR has been  
Notes:  
met (if the previous state was self refresh).  
2. This table is bank-specific, except where noted (the current state is for a specific bank  
and the commands shown are those allowed to be issued to that bank when in that  
state). Exceptions are covered in the notes below.  
3. Current state definitions:  
The bank has been precharged, tRP has been met, and any READ burst is com-  
plete.  
Idle:  
Row  
A row in the bank has been activated, and tRCD has been met. No data bursts/  
active: accesses and no register accesses are in progress.  
Read: A READ burst has been initiated, with auto precharge disabled and has not yet  
terminated.  
Write: A WRITE burst has been initiated with auto precharge disabled and has not yet  
terminated.  
4. The following states must not be interrupted by a command issued to the same bank.  
Issue DESELECT or NOP commands, or allowable commands to the other bank, on any  
clock edge occurring during these states. Allowable commands to the other bank are  
determined by its current state and this table, and according to Table 38 (page 71).  
PDF: 09005aef821ae8bf  
1GbDDR2.pdf – Rev. T 02/10 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
69  
© 2004 Micron Technology, Inc. All rights reserved.  
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