1Gb: x4, x8, x16 DDR3 SDRAM
Data Setup, Hold, and Derating
Table 67: Derating Values for tDS/tDH – AC135/DC100-Based at 1V/ns
Shaded cells indicate slew rate combinations not supported
ΔtDS, ΔtDH Derating (ps) – AC/DC-Based
DQS, DQS# Differential Slew Rate
2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns
Rate V/ns ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH
4.0 V/ns
3.0 V/ns
1.2 V/ns
1.0 V/ns
DQ Slew
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
68
45
0
50
34
0
68
45
0
50
34
0
68
45
0
50
34
0
53
8
42
8
16
18
19
22
25
16
12
6
2
–4
2
–4
–10
10
11
14
4
26
27
30
33
29
20
14
8
3
–2
–8
35
38
41
37
30
24
18
8
0
46
49
45
38
34
24
–19
–2
–16
–6
26
–10
–10
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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