256Mb, 3V Multiple I/O Serial Flash Memory
Extended Address Register
Extended Address Register
The 3-byte address mode can only access 128Mb of memory. To access the full device in
3-byte address mode, the device includes an extended address register that indirectly
provides a fourth address byte A[31:25]. The extended address register bit A0 operates as
memory address bit A24 to select one of the two 128Mb segments of the memory array.
If 4-byte addressing is enabled, the extended address register settings are ignored.
Table 6: Extended Address Register
Bit
7:1
0
Name
A[31:25]
A24
Settings
Description
0000000
Reserved
1 = Highest 128Mb segment
0 = Lowest 128Mb segment (default)
Enables specified 128Mb memory segment. The de-
fault (lowest) setting can be changed to the high-
est 128Mb segment using bit 1 of the nonvolatile
configuration register.
Figure 13: Memory Array Segments
01FFFFFFh
A24 = 1
00FFFFFFh
01000000h
A24 = 0
00000000h
The PROGRAM and ERASE operations act upon the 128Mb segment selected in the ex-
tended address register. The BULK ERASE operation erases the entire device.
The READ operation begins reading in the selected 128Mb segment, but is not bound
by it.
In a continuous READ, when the last byte of the segment is read, the next byte output is
the first byte of the next segment. The operation wraps to 0000000h; therefore, a down-
load of the whole array is possible with one READ operation.
The value of the extended address register does not change when a READ operation
crosses the selected 128Mb boundary.
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
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