8GB (x72, ECC, DR) 240-Pin DDR3 VLP RDIMM
Registering Clock Driver Specifications
Registering Clock Driver Specifications
Table 13: Registering Clock Driver Electrical Characteristics
SSTE32882 devices or equivalent
Parameter
Symbol
VDD
Pins
Min
Nom
1.5
Max
Units
DC supply voltage
DC reference voltage
–
–
–
1.425
1.575
V
V
V
VREF
0.49 × VDD - 20mV
0.49 × VDD - 20mV
0.5 × VDD
0.5 × VDD
0.51 × VDD + 20mV
0.51 × VDD + 20mV
DC termination
voltage
VTT
AC high-level input
voltage
VIH(AC)
VIL(AC)
Control, command,
address
VREF + 175mV
–0.4
–
VDD + 400mV
VREF - 175mV
VDD + 0.4
V
V
V
V
V
V
V
AC low-level input
voltage
Control, command,
address
–
DC high-level input
voltage
VIH(DC)
Control, command,
address
VREF + 100mV
–0.4
–
DC low-level input
voltage
VIL(DC)
Control, command,
address
–
VREF - 100mV
VDD
High-level input
voltage
VIH(CMOS)
VIL(CMOS)
VIX(AC)
RESET#, MIRROR
0.65 × VDD
0
–
–
Low-level input
voltage
RESET#, MIRROR
0.35 × VDD
Differential input
crosspoint voltage
range
CK, CK#, FBIN, FBIN#
0.5 × VDD - 175mV
0.5 × VDD
0.5 × VDD + 175mV
Differential input
voltage
VID(AC)
IOH
CK, CK#
Err_Out#
Err_Out#
350
–
–
–
–
VDD + TBD
TBD
mV
mA
mA
High-level output
current
Low-level output
current
IOL
TBD
TBD
1. Timing and switching specifications for the register listed are critical for proper opera-
tion of the DDR3 SDRAM RDIMMs. These are meant to be a subset of the parameters for
the specific device used on the module.
Note:
PDF: 09005aef8482a8a7
jdf18c1gx72pdz.pdf – Rev. D 12/12 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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