256Mb: 3V Embedded Parallel NOR Flash
Standard Command Definitions – Address/Data Cycles
Standard Command Definitions – Address/Data Cycles
Table 9: Standard Command Definitions – Address/Data Cycles, 8-Bit and 16-Bit
Note 1 applies to entire table
Address and Data Cycles
1st
2nd
3rd
4th
5th
6th
Command and
Code/Subcode
Bus
Size
A
D
A
D
A
D
A
D
A
D
A
D
Notes
READ and AUTO SELECT Operations
READ/RESET (F0h)
x8
X
F0
AAA AA
555
55
55
X
X
F0
F0
x16
X
F0
555
AA
55
AA 2AA
98
READ CFI (98h)
x8
x16
x8
AUTO SELECT (90h)
AAA AA
555
555
55
AAA
555
90 Note Note
2, 3, 4
2
2
x16
2AA
BYPASS Operations
UNLOCK BYPASS (20h)
x8
x16
x8
AAA AA
555
555
2AA
X
55
00
AAA
555
20
UNLOCK BYPASS
RESET (90h/00h)
X
90
x16
PROGRAM Operations
PROGRAM (A0h)
x8
x16
x8
AAA AA
555
555
2AA
PA
55
PD
55
N
AAA A0
555
PA
PD
N
UNLOCK BYPASS
PROGRAM (A0h)
X
A0
5
6, 7, 8
5
x16
x8
WRITE TO BUFFER
PROGRAM (25h)
AAA AA
555
555
2AA
BAd
BAd
PA
25
BAd
PA
PD
x16
x8
UNLOCK BYPASS
WRITE TO BUFFER
PROGRAM (25h)
BAd
25
PD
x16
WRITE TO BUFFER
PROGRAM CONFIRM
(29h)
x8
BAd
29
x16
BUFFERED PROGRAM
ABORT and RESET (F0h)
x8
x16
x8
AAA AA
555
555
55
55
AAA
555
F0
38
2AA
ENTER ENHANCED
BUFFERED
PROGRAM (38h)
NA
x16
555
AA 2AA
555
ENHANCED
BUFFERED
PROGRAM (33h)
x8
NA
BAd Data BAd Data
(00) (01)
9
x16 BAd
33
PDF: 09005aef84bd3b68
m29w_256mb.pdf - Rev. C 7/13 EN
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