256Mb: 3V Embedded Parallel NOR Flash
Standard Command Definitions – Address-Data Cycles
Standard Command Definitions – Address-Data Cycles
Table 14: Standard Command Definitions – Address-Data Cycles, 16-Bit
Note 1 applies to entire table
Address and Data Cycles
1st
2nd
3rd
4th
5th
6th
Command and
Code/Subcode
Bus
Size
A
D
A
D
A
D
A
D
A
D
A
D
Notes
READ and AUTO SELECT Operations
READ/RESET (F0h)
READ CFI (98h)
x16
X
F0
555
AA 2AA
98
55
X
F0
x16 BKA
555
UNLOCK BYPASS
READ CFI (98h)
x16 BKA
98
AUTO SELECT (90h)
x16
555
AA 2AA
55
BKA
555
90 Note Note
2, 3, 4
2
2
BYPASS Operations
UNLOCK BYPASS (20h)
x16
x16
555
X
AA 2AA
55
00
555
20
UNLOCK BYPASS
RESET (90h/00h)
90
X
PROGRAM Operations
PROGRAM (A0h)
x16
x16
555
X
AA 2AA
A0 PA
55
555
A0
PA
PD
N
UNLOCK BYPASS
PROGRAM (A0h)
PD
5
6, 7, 8
5
WRITE TO BUFFER
PROGRAM (25h)
x16
555
AA 2AA
55
N
BAd
PA
25
BAd
PA
PD
UNLOCK BYPASS
WRITE TO BUFFER
PROGRAM (25h)
x16 BAd
x16 BAd
25
29
BAd
PD
WRITE TO BUFFER
PROGRAM CONFIRM
(29h)
BUFFERED PROGRAM
ABORT and RESET (F0h)
x16
x16
555
555
AA 2AA
AA 2AA
55
55
555
555
F0
38
ENTER
9
9
ENHANCED
BUFFERED
PROGRAM COMMAND
SET (38h)
ENHANCED
BUFFERED
x16 BAd
33
BAd Data BAd Data
(00) (01)
PROGRAM (33h)
PDF: 09005aef84ecabef
m29dw_256g.pdf - Rev. A 10/12 EN
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