256Mb: 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 21: CE#-Controlled Program AC Timing
3rd Cycle 4th Cycle
Data Polling
PA
Read Cycle
t
t
WC
WC
A[MAX:0]
WE#
555h
t
PA
t
AS
AH
t
WH
t
WS
t
OE
t
GHEL
OE#
CE#
t
t
CP
CPH
t
E
t
t
WHWH1
DQ7#
DF
t
t
DS
t
OH
DQ[15:0]
Notes:
AOh
PD
D
D
OUT
OUT
DH
1. Only the third and fourth cycles of the PROGRAM command are represented. The PRO-
GRAM command is followed by checking of the status register data polling bit.
2. PA is the address of the memory location to be programmed. PD is the data to be pro-
grammed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (See Data Polling Bit
[DQ7]).
4. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef84ecabef
m29dw_256g.pdf - Rev. A 10/12 EN
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