M25PX16
Power-up and power-down
7
Power-up and power-down
At power-up and power-down, the device must not be selected (that is Chip Select (S) must
follow the voltage applied on V ) until V reaches the correct value:
CC
CC
V
V
(min) at power-up, and then for a further delay of t
at power-down
CC
SS
VSL
A safe configuration is provided in Section 3: SPI modes.
To avoid data corruption and inadvertent write operations during power-up, a Power On
Reset (POR) circuit is included. The logic inside the device is held reset while V is less
CC
than the Power On Reset (POR) threshold voltage, V – all operations are disabled, and
WI
the device does not respond to any instruction.
Moreover, the device ignores all Write Enable (WREN), Page Program (PP), Dual Input Fast
Program (DIFP), Program OTP (POTP), Subsector Erase (SSE), Sector Erase (SE), Bulk
Erase (BE), Write Status Register (WRSR) and Write to Lock Register (WRLR) instructions
until a time delay of t
has elapsed after the moment that V rises above the V
PUW
CC WI
threshold. However, the correct operation of the device is not guaranteed if, by this time,
is still below V (min). No Write Status Register, Program or Erase instructions should
V
CC
CC
be sent until the later of:
t
t
after V has passed the V threshold
CC WI
PUW
VSL
after V has passed the V (min) level.
CC
CC
These values are specified in Table 11.
If the time, t , has elapsed, after V rises above V (min), the device can be selected
VSL
CC
CC
for READ instructions even if the t
delay has not yet fully elapsed.
PUW
After power-up, the device is in the following state:
The device is in the Standby Power mode (not the Deep Power-down mode).
The Write Enable Latch (WEL) bit is reset.
The Write In Progress (WIP) bit is reset.
The Lock Registers are configured as: (Write Lock bit, Lock Down bit) = (0,0)
Normal precautions must be taken for supply line decoupling, to stabilize the V supply.
CC
Each device in a system should have the V line decoupled by a suitable capacitor close
CC
to the package pins (generally, this capacitor is of the order of 100 nF).
At power-down, when V drops from the operating voltage, to below the Power On Reset
CC
(POR) threshold voltage, V , all operations are disabled and the device does not respond
WI
to any instruction. (The designer needs to be aware that if power-down occurs while a Write,
Program or Erase cycle is in progress, some data corruption may result.)
V
must be applied only when V is stable and in the V min to V max voltage
PPH CC CC CC
range.
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MICRON [ MICRON TECHNOLOGY ]
