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M25PX16SOVZM6TP 参数 Datasheet PDF下载

M25PX16SOVZM6TP图片预览
型号: M25PX16SOVZM6TP
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位,双I / O , 4 KB的界别分组擦除,串行闪存与75 MHz的SPI总线接口 [16-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 65 页 / 1418 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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M25PX16  
Memory organization  
5
Memory organization  
The memory is organized as:  
„
„
„
„
„
2 097 152 bytes (8 bits each)  
512 subsectors (4 Kbytes each)  
32 sectors (64 Kbytes each)  
8192 pages (256 bytes each)  
64 OTP bytes located outside the main memory array  
Each page can be individually programmed (bits are programmed from 1 to 0). The device is  
Subsector, Sector or Bulk Erasable (bits are erased from 0 to 1) but not Page Erasable.  
Figure 7.  
Block diagram  
HOLD  
W/VPP  
S
High Voltage  
Generator  
Control Logic  
64 OTP bytes  
C
DQ0  
DQ1  
I/O Shift Register  
Status  
Register  
Address Register  
and Counter  
256 Byte  
Data Buffer  
1FFFFFh  
00000h  
000FFh  
256 bytes (page size)  
X Decoder  
AI13722a-1  
19/65