256Mb and 512Mb (256Mb/256Mb), P30-65nm
Common Flash Interface
Table 26: Block Region Map Information (Continued)
256Mb
256Mb
Address
2E:
Bottom
--00
Top
--00
--00
Address
37:
Bottom
--00
Top
--00
--00
2F:
--80
38:
--00
Table 27: Primary Vendor-Specific Extended Query
Hex Offset
ASCII Value
(DQ[7:0])
P = 10Ah
Length
Description
Address Hex Code
(P+0)h
(P+1)h
(P+2)h
3
Primary extended query table, unique ASCII
string: PRI
10A:
10B:
10C:
10D:
10E:
10F:
110:
111:
112:
- -50
- -52
P
R
I
- -49
(P+3)h
(P+4)h
1
1
4
Major version number, ASCII
Minor version number, ASCII
- -31
1
4
–
–
–
–
- -34
(P+5)h
(P+6)h
(P+7)h
(P+8)h
Optional feature and command support (1 = yes;
0 = no)
Bits 11 - 29 are reserved; undefined bits are 0
If bit 31 = 1, then another 31-bit field of optional
features follows at the end of the bit 30 field.
- -E6
- -01
- -00
See Note 1
Bit 0: Chip erase supported.
bit 0 = 0
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
No
No
No
Bit 1: Suspend erase supported.
bit 1 = 1
bit 2 = 1
bit 3 = 0
bit 4 = 0
bit 5 = 1
bit 6 = 1
bit 7 = 1
bit 8 = 1
bit 9 = 0
Bit 2: Suspend program supported.
Bit 3: Legacy lock/unlock supported.
Bit 4: Queued erase supported.
Bit 5: Instant individual block locking supported.
Bit 6: OTP bits supported.
Bit 7: Page mode read supported.
Bit 8: Synchronous read supported.
Bit 9: Simultaneous operations supported.
Bit 10: Extended Flash array block supported
bit 10 = 0
bit 11 = 0
Bit 11: Permanent block locking of up to full
main array supported
Bit 12: Permanent block locking of up to partial
main array supported
bit 12 = 0
No
Bit 30: CFI links to follow:
bit 30 = 0
bit 31 = 0
See Note 1
Bit 31: Another optional features field to follow.
(P+9)h
1
Supported functions after SUSPEND: READ AR-
RAY, STATUS, QUERY. Other supported options in-
clude:
113:
- -01
–
Bits 1 - 7: Reserved; undefined bits are 0.
Bit 0: Program supported after ERASE SUSPEND.
bit 0 = 1
Yes
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p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
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