256Mb and 512Mb (256Mb/256Mb), P30-65nm
Common Flash Interface
Table 25: Device Geometry
Hex
Hex
Code
ASCII Value
(DQ[7:0])
Offset Length
Description
n such that device size in bytes = 2n.
Address
27:
27h
28h
1
2
See Note 1
x16
Flash device interface code assignment: n such that n + 1
specifies the bit field that represents the flash device width
capabilities as described here:
bit 0: x8
28:
- -01
- -00
29:
bit 1: x16
bit 2: x32
bit 3: x64
bits 4 - 7: –
bits 8 - 15: –
2Ah
2Ch
2
1
n such that maximum number of bytes in write buffer = 2n.
2Ah
2Bh
2Ch
- -0A
- -00
1024
Number of erase block regions (x) within the device:
1) x = 0 means no erase blocking; the device erases in bulk.
2) x specifies the number of device regions with one or more
contiguous, same-size erase blocks.
See Note 1
3) Symmetrically blocked partitions have one blocking region.
2Dh
31h
35h
4
4
4
Erase block region 1 information:
bits 0 - 15 = y, y + 1 = number of identical-size erase blocks.
bits 16 - 31 = z, region erase block(s) size are z x 256 bytes.
2D:
2E:
2F:
30:
See Note 1
See Note 1
See Note 1
Erase block region 2 information:
bits 0 - 15 = y, y + 1 = number of identical-size erase blocks.
bits 16 - 31 = z, region erase block(s) size are z x 256 bytes.
31:
32:
33:
34:
Reserved for future erase block region information.
35:
36:
37:
38:
1. See Block Region Map Information table.
Note:
Table 26: Block Region Map Information
256Mb
256Mb
Address
27:
Bottom
--19
Top
--19
--01
--00
--0A
--00
--02
--FE
Address
30:
Bottom
--00
Top
--02
--03
--00
--80
--00
--00
--00
28:
--01
31:
--FE
29:
--00
32:
--00
2A:
--0A
--00
33:
--00
2B:
34:
--02
2C:
--02
35:
--00
2D:
--03
36:
--00
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
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