256Mb and 512Mb (256Mb/256Mb), P30-65nm
Device Command Codes
Device Command Codes
The system CPU provides control of all in-system READ, WRITE, and ERASE operations
of the device via the system bus. The device manages all block-erase and word-program
algorithms.
Device commands are written to the command user interface (CUI) to control all flash
memory device operations. The CUI does not occupy an addressable memory location;
it is the mechanism through which the Flash device is controlled.
Note: For 512Mb (256Mb/256Mb) device, all the setup commands should be re-issued
to the device when a different die is selected.
Table 10: Command Codes and Definitions
Mode
Code
Device Mode
Read Array
Description
Read
0xFF
Places the device in Read Array mode. Array data is output on
DQ[15:0].
0x70
0x90
Read Status Register Places the device in Read Status Register mode. The device enters this
mode after a program or erase command is issued. Status Register data
is output on DQ[7:0].
Read Device ID or
Places device in Read Device Identifier mode. Subsequent reads output
Read Configuration manufacturer/device codes, Configuration Register data, Block Lock
Register (RCR)
Read CFI
status, or Protection Register data on DQ[15:0].
0x98
0x50
0x40
Places the device in Read CFI mode. Subsequent reads output Common
Flash Interface information on DQ[7:0].
Clear Status Register The device sets Status Register error bits. The Clear Status Register com-
mand is used to clear the SR error bits.
Write
Word Program Setup First cycle of a 2-cycle programming command; prepares the CUI for a
write operation. On the next write cycle, the address and data are
latched and the device executes the programming algorithm at the ad-
dressed location. During program operations, the device responds only
to Read Status Register and Program Suspend commands. CE# or OE#
must be toggled to update the Status Register in asynchronous read.
CE# or ADV# must be toggled to update the Status Register Data for
synchronous Non-array reads. The Read Array command must be issued
to read array data after programming has finished.
0xE8
0xD0
Buffered Program
This command loads a variable number of words up to the buffer size
of 512 words onto the program buffer.
Buffered Program
Confirm
The confirm command is issued after the data streaming for writing in-
to the buffer is completed. The device then performs the Buffered Pro-
gram algorithm, writing the data from the buffer to the Flash memory
array.
0x80
0xD0
BEFP Setup
First cycle of a 2-cycle command; initiates Buffered Enhanced Factory
Program mode (BEFP). The CUI then waits for the BEFP Confirm com-
mand, 0xD0, that initiates the BEFP algorithm. All other commands are
ignored when BEFP mode begins.
BEFP Confirm
If the previous command was BEFP Setup (0x80), the CUI latches the ad-
dress and data, and prepares the device for BEFP mode.
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. A 1/13 EN
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